85370 Commits

Author SHA1 Message Date
Pirama Arumuga Nainar
7845ed025c Fix fptosi, fptoui from f16 vectors to i8, i16 vectors
Summary:
Convert f16 vectors to corresponding f32 vectors before doing the
conversion to int.

Add tests for v4f16, v8f16.

Reviewers: ab, jmolloy

Subscribers: llvm-commits, srhines

Differential Revision: http://reviews.llvm.org/D14936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255263 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 17:16:49 +00:00
Sanjay Patel
2bce431402 [InstCombine] fold bitcasts around an extractelement (3rd try)
This is a redo of r255137 (reverted at r255227) which was a redo of 
r255124 (reverted at r255126) with a fixed check for a scalar source 
type and an added test for the failure that caused the revert.

Original commit message:

Example:
  bitcast (extractelement (bitcast <2 x float> %X to <2 x i32>), 1) to float
    --->
  extractelement <2 x float> %X, i32 1

This is part of fixing PR25543:
https://llvm.org/bugs/show_bug.cgi?id=25543

The next step will be to generalize this fold:
trunc ( lshr ( bitcast X) ) -> extractelement (X)

Ie, I'm hoping to replace the existing transform of:
bitcast ( trunc ( lshr ( bitcast X)))
added by:
http://reviews.llvm.org/rL112232

with 2 less specific transforms to catch the case in the bug report.

Differential Revision: http://reviews.llvm.org/D14879



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255261 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 17:09:28 +00:00
Teresa Johnson
1b061251f0 [ThinLTO] Debug message cleanup (NFC)
Added some missing spaces between the module identifier and the start of
the debug message. Also added a ":" after the module identifier to make
this look a little nicer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255259 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 16:39:07 +00:00
Rafael Espindola
4d1332c4e7 Avoid undefined behavior when vector is empty.
Found by ubsan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255258 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 16:35:06 +00:00
Sanjay Patel
f3ba0560c0 remove duplicated comments and don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255257 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 16:34:21 +00:00
Rafael Espindola
da5132018f Slit lib/Linker in two.
A linker normally has two stages: symbol resolution and "moving stuff".

In lib/Linker there is the complication of lazy linking some globals,
but it was still far more mixed than it needed to.

This splits the linker into a lower level IRMover and the linker proper.
The IRMover just takes a list of globals to move and a callback that
lets the user control what is lazy linked.

The main motivation is that now tools/gold (and soon lld) can use their
own symbol resolution to instruct IRMover what to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255254 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 14:19:35 +00:00
Dan Gohman
079d48b39e [WebAssembly] Make WebAssemblyStoreResults only return true when it has a change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255253 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 14:17:36 +00:00
Dan Gohman
5b3101aa98 [WebAssembly] Fix WebAssemblyPeephole to set Changed to true when making changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255252 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 14:16:34 +00:00
Dan Gohman
9e8e46050a [WebAssembly] Declare that WebAssemblyPeephole does not modify the CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255251 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 14:12:04 +00:00
Dan Gohman
4dc8c1b7ed [WebAssembly] Remove an unneeded getAnalysisUsage override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255250 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 14:10:04 +00:00
Chad Rosier
d4526d51db [DeadStoreElimination] Add support for non-local DSE.
We extend the search for redundant stores to predecessor blocks that
unconditionally lead to the block BB with the current store instruction.  That
also includes single-block loops that unconditionally lead to BB, and
if-then-else blocks where then- and else-blocks unconditionally lead to BB.

http://reviews.llvm.org/D13363
Patch by Ivan Baev <ibaev@codeaurora.org>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255247 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 13:51:43 +00:00
Nemanja Ivanovic
1c23594d2c Bitcasts between FP and INT values using direct moves
This patch corresponds to review:
http://reviews.llvm.org/D15286

LLVM IR frequently contains bitcast operations between floating point and
integer values of the same width. Doing this through memory operations is
quite expensive on PPC. This patch allows the use of direct register moves
between FPRs and GPRs for lowering bitcasts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255246 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 13:35:28 +00:00
Amjad Aboud
7db3980c5f Macro debug info support in LLVM IR
Introduced DIMacro and DIMacroFile debug info metadata in the LLVM IR to support macros.

Differential Revision: http://reviews.llvm.org/D14687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255245 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 12:56:35 +00:00
Silviu Baranga
f1cbc17304 [LLE] Use the PredicatedScalarEvolution interface to query SCEVs for dependences
Summary:
LAA uses the PredicatedScalarEvolution interface, so it can produce
forward/backward dependences having SCEVs that are AddRecExprs only after being
transformed by PredicatedScalarEvolution.

Use PredicatedScalarEvolution to get the expected expressions.

Reviewers: anemet

Subscribers: llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D15382

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255241 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 11:07:18 +00:00
Jonas Paulsson
92969682ea [PostRA scheduling] Allow a target to do scheduling when it wants post RA.
SystemZ needs to do its scheduling after branch relaxation, which can
only happen after block placement, and therefore the standard
PostRAScheduler point in the pass sequence is too early.

TargetMachine::targetSchedulesPostRAScheduling() is a new method that
signals on returning true that target will insert the final scheduling
pass on its own.

Reviewed by Hal Finkel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255234 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 09:10:07 +00:00
Akira Hatanaka
342c5a6432 Revert r255137.
This commit broke apple's internal bot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255227 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 08:00:52 +00:00
Sanjoy Das
fd947f33ba Add arg_begin() and arg_end() to CallInst and InvokeInst; NFCI
- This simplifies the CallSite class, arg_begin / arg_end are now
   simple wrapper getters.

 - In several places, we were creating CallSite instances solely to call
   arg_begin and arg_end.  With this change, that's no longer required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255226 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 06:39:02 +00:00
Craig Topper
224a9299ff [X86] Fix a couple cases were bitwise and logical operations were being mixed. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 06:09:41 +00:00
Dan Gohman
54fd4d4360 [WebAssembly] Implement mixed-type ISD::FCOPYSIGN.
ISD::FCOPYSIGN permits its operands to have differing types, and DAGCombiner
uses this. Add some def : Pat rules to expand this out into an explicit
conversion and a normal copysign operation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255220 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 04:55:31 +00:00
Dan Gohman
cc39a6efb8 [WebAssembly] Implement fma.
It is lowered to a libcall for now, but this is expected to change in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255219 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 04:52:33 +00:00
Tom Stellard
7e9bd658a7 AMDGPU/SI: Fix warning introduced by r255204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255205 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 03:10:46 +00:00
Tom Stellard
7d2a810fef AMDGPU/SI: Emit constant arrays in the .text section
Summary:
This allows us to remove the END_OF_TEXT_LABEL hack we had been using
and simplifies the fixups used to compute the address of constant
arrays.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255204 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 02:13:01 +00:00
Tom Stellard
6052acda66 AMDGPU/SI: Add support for sgpr and vgpr inline assembly constraints
Summary: The 's' constraint represents sgprs and the 'v' constraint represents vgprs.

Reviewers: arsenm, echristo

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255203 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 02:12:53 +00:00
Dan Gohman
b2d324bc23 [WebAssembly] Fix legalization of f32->f64 EXTLOAD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255202 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 02:07:53 +00:00
Derek Schuff
b4fe333388 [WebAssembly] Update known test failures
We can now select sign_extend_inreg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255197 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 01:09:40 +00:00
Matthias Braun
a84e7b8f4d RegisterPressure: Factor out liveness dead-def detection logic; NFCI
Detecting additional dead-defs without a dead flag that are only visible
through liveness information should be part of the register operand
collection not intertwined with the register pressure update logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 01:04:15 +00:00
Dan Gohman
3384127652 [WebAssembly] Also legalize sign_extend_inreg of i32->i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 01:00:19 +00:00
Derek Schuff
0c2c493a1d [WebAssembly] Update test failure expectations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255190 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 00:56:18 +00:00
Dan Gohman
029e84caf4 PeepholeOptimizer: Ignore dead implicit defs
Target-specific instructions may have uninteresting physreg clobbers,
for target-specific reasons. The peephole pass doesn't need to concern
itself with such defs, as long as they're implicit and marked as dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255182 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 00:37:51 +00:00
Dan Gohman
a796bb8e0a [WebAssembly] Fix legalization of shift operators with illegal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255181 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 00:26:26 +00:00
Dan Gohman
f39d8644fa [WebAssembly] Fix copy+pastos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255180 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 00:22:40 +00:00
Dan Gohman
492f1085a4 [WebAssembly] Implement anyext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 00:17:35 +00:00
Quentin Colombet
d110e2b4a3 [X86] Enable shrink-wrapping by default, but keep it disabled for stack frames
without a frame pointer when unwind may happen.
This is a workaround for a bug in the way we emit the CFI directives for
frameless unwind information. See PR25614.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255175 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 23:08:18 +00:00
Sanjay Patel
28e18e1782 use range-based for loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255171 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 22:45:45 +00:00
Rafael Espindola
fad81ab170 Synchronize the logic for deciding to link a gv.
We were deciding to not link an available_externally gv over a
declaration, but then copying over the body anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255169 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 22:44:00 +00:00
Justin Bogner
4381284cf8 IR: Make ConstantDataArray::getFP actually return a ConstantDataArray
The ConstantDataArray::getFP(LLVMContext &, ArrayRef<uint16_t>)
overload has had a typo in it since it was written, where it will
create a Vector instead of an Array. This obviously doesn't work at
all, but it turns out that until r254991 there weren't actually any
callers of this overload. Fix the typo and add some test coverage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 21:21:07 +00:00
Reid Kleckner
48649c79c2 [Float2Int] Don't operate on vector instructions
This fixes a crash bug. It's also not clear if we'd want to do this
transform for vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255155 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 21:08:18 +00:00
Rafael Espindola
e919414c03 Don't assign a temporary string to a StringRef.
Should fix the windows debug and asan bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255149 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 20:41:10 +00:00
Sanjoy Das
587b47add0 Use WeakVH to keep track of calls with operand bundles in CloneCodeInfo
`CloneAndPruneIntoFromInst` can DCE instructions after cloning them into
the new function, and so an AssertingVH is too strong.  This change
switches CloneCodeInfo to use a std::vector<WeakVH>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255148 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 20:33:52 +00:00
Sanjoy Das
9b40f2a9a5 Delete trailing whitespace; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255147 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 20:33:45 +00:00
Teresa Johnson
fbc5640b6b [ThinLTO] FunctionImport pass can take a const index pointer (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255140 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 19:39:47 +00:00
Sanjay Patel
1e3aaa8bef [InstCombine] fold bitcasts around an extractelement (2nd try)
This is a redo of r255124 (reverted at r255126) with an added check for a
scalar destination type and an added test for the failure seen in Clang's
test/CodeGen/vector.c. The extra test shows a different missing optimization.

Original commit message:

Example:
  bitcast (extractelement (bitcast <2 x float> %X to <2 x i32>), 1) to float
    --->
  extractelement <2 x float> %X, i32 1

This is part of fixing PR25543:
https://llvm.org/bugs/show_bug.cgi?id=25543

The next step will be to generalize this fold:
trunc ( lshr ( bitcast X) ) -> extractelement (X)

Ie, I'm hoping to replace the existing transform of:
bitcast ( trunc ( lshr ( bitcast X)))
added by:
http://reviews.llvm.org/rL112232

with 2 less specific transforms to catch the case in the bug report.

Differential Revision: http://reviews.llvm.org/D14879



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 18:57:16 +00:00
Michael Zolotukhin
4c0fb60923 Revert "Revert r253253 and r253126: "Don't recompute LCSSA after loop-unrolling when possible.""
The bug in IndVarSimplify was fixed in r254976, r254977, so I'm
reapplying the original patch for avoiding redundant LCSSA recomputation.

This reverts commit ffe3b434e505e403146aff00be0c177bb6d13466.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255133 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 18:20:28 +00:00
Rong Xu
65711ad4e3 [PGO] Resubmit "MST based PGO instrumentation infrastructure" (r254021)
This new patch fixes a few bugs that exposed in last submit. It also improves
the test cases.
--Original Commit Message--
This patch implements a minimum spanning tree (MST) based instrumentation for
PGO. The use of MST guarantees minimum number of CFG edges getting
instrumented. An addition optimization is to instrument the less executed
edges to further reduce the instrumentation overhead. The patch contains both the
instrumentation and the use of the profile to set the branch weights.

Differential Revision: http://reviews.llvm.org/D12781



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255132 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 18:08:16 +00:00
Mehdi Amini
cf1e58c002 Revert "[InstCombine] fold bitcasts around an extractelement"
This reverts commit r255124.

Broke http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/4193/steps/test/logs/stdio

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255126 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 16:31:39 +00:00
Dan Gohman
4c8fe28374 [WebAssembly] Reintroduce ARGUMENT moving logic
Reinteroduce the code for moving ARGUMENTS back to the top of the basic block.
While the ARGUMENTS physical register prevents sinking and scheduling from
moving them, it does not appear to be sufficient to prevent SelectionDAG from
moving them down in the initial schedule. This patch introduces a patch that
moves them back to the top immediately after SelectionDAG runs.

This is still hopefully a temporary solution. http://reviews.llvm.org/D14750 is
one alternative, though the review has not been favorable, and proposed
alternatives are longer-term and have other downsides.

This fixes the main outstanding -verify-machineinstrs failures, so it adds
-verify-machineinstrs to several tests.

Differential Revision: http://reviews.llvm.org/D15377


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255125 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 16:23:59 +00:00
Sanjay Patel
eb103602da [InstCombine] fold bitcasts around an extractelement
Example:
  bitcast (extractelement (bitcast <2 x float> %X to <2 x i32>), 1) to float
    --->
  extractelement <2 x float> %X, i32 1

This is part of fixing PR25543:
https://llvm.org/bugs/show_bug.cgi?id=25543

The next step will be to generalize this fold:
trunc ( lshr ( bitcast X) ) -> extractelement (X)

Ie, I'm hoping to replace the existing transform of:
bitcast ( trunc ( lshr ( bitcast X)))
added by:
http://reviews.llvm.org/rL112232

with 2 less specific transforms to catch the case in the bug report.

Differential Revision: http://reviews.llvm.org/D14879



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255124 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 16:17:20 +00:00
Silviu Baranga
90f6cd579a Re-commit r255115, with the PredicatedScalarEvolution class moved to
ScalarEvolution.h, in order to avoid cyclic dependencies between the Transform
and Analysis modules:

[LV][LAA] Add a layer over SCEV to apply run-time checked knowledge on SCEV expressions

Summary:
This change creates a layer over ScalarEvolution for LAA and LV, and centralizes the
usage of SCEV predicates. The SCEVPredicatedLayer takes the statically deduced knowledge
by ScalarEvolution and applies the knowledge from the SCEV predicates. The end goal is
that both LAA and LV should use this interface everywhere.

This also solves a problem involving the result of SCEV expression rewritting when
the predicate changes. Suppose we have the expression (sext {a,+,b}) and two predicates
  P1: {a,+,b} has nsw
  P2: b = 1.

Applying P1 and then P2 gives us {a,+,1}, while applying P2 and the P1 gives us
sext({a,+,1}) (the AddRec expression was changed by P2 so P1 no longer applies).
The SCEVPredicatedLayer maintains the order of transformations by feeding back
the results of previous transformations into new transformations, and therefore
avoiding this issue.

The SCEVPredicatedLayer maintains a cache to remember the results of previous
SCEV rewritting results. This also has the benefit of reducing the overall number
of expression rewrites.

Reviewers: mzolotukhin, anemet

Subscribers: jmolloy, sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D14296



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255122 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 16:06:28 +00:00
Tim Northover
6d8e50b6e2 ARM: don't use a deleted node as the BaseReg in complex pattern.
We mutated the DAG, which invalidated the node we were trying to use
as a base register. Sometimes we got away with it, but other times the
node really did get deleted before it was finished with.

Should fix PR25733

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 15:54:50 +00:00
JF Bastien
fecb71a6a4 WebAssembly: add missing failure to the list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255119 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-09 15:52:57 +00:00