Commit Graph

38666 Commits

Author SHA1 Message Date
Dan Gohman
7c2e03916c Factor out the code for picking integer arithmetic with immediate
opcodes into a helper function. This fixes a few places in the code
which were not properly selecting the 8-bit-immediate opcodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104091 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 00:53:19 +00:00
Dan Gohman
57aaa0b264 Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 23:55:57 +00:00
Dan Gohman
360026f07f Fix the predicate which checks for non-sensical formulae which have
constants in registers which partially cancel out their immediate fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104088 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 23:48:08 +00:00
Dan Gohman
b2df433f71 Factor out the code for recomputing an LSRUse's Regs set after some
of its formulae have been removed into a helper function, and also
teach it how to update the RegUseTracker.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104087 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 23:42:37 +00:00
Bob Wilson
417d1705bb Fix a crash when debugging the coalescer. DebugValue instructions are not
in the coalescer's instruction map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104086 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 23:19:42 +00:00
Dan Gohman
d079c300ed Factor out code for estimating search space complexity into a helper
function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 22:51:59 +00:00
Dan Gohman
0da751baf7 Add some more debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 22:41:32 +00:00
Dan Gohman
d69d62833a Factor out the code for deleting a formula from an LSRUse into
a helper function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 22:39:15 +00:00
Dan Gohman
6458ff9230 Make some debug output more informative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 22:37:37 +00:00
Dan Gohman
c4cfbaf217 Print an error message in Formula::print if the HasBaseReg flag
is inconsistent with the BaseRegs field. It's not print's job to
assert on an invalid condition, but it can make one more obvious.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104077 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 22:35:55 +00:00
Dan Gohman
90bb355b16 Rename RegUseTracker's RegUses member to RegUsesMap to avoid
confusion with LSRInstance's RegUses member.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 22:33:00 +00:00
Jakob Stoklund Olesen
dcf7708ad9 Remember to update VirtRegLastUse when spilling without killing before a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 22:20:09 +00:00
Dan Gohman
f8c1ef0510 Teach mode load folding and unfolding code about CMP32ri8 and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:54:15 +00:00
Bill Wendling
2abc93d0fb Don't eliminate frame pointers from leaf functions if "--disable-fp-elim" is
specified.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:47:08 +00:00
Dan Gohman
e5efbafdac When converting a test to a cmp to fold a load, use the cmp that has an
8-bit immediate field rather than one with a wider immediate field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:42:03 +00:00
Chris Lattner
6db0363bdc make mcinstlower remove all but the first operand to CALL64pcrel32.
The register use operands (e.g. the first argument is passed in a 
register) is currently being modeled as a normal register use,
instead of correctly being an implicit use.  This causes the operand
to get propagated onto the mcinst, which was causing the encoder to
emit a rex prefix byte, which generates an invalid call.

This fixes rdar://7998435


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:40:18 +00:00
Evan Cheng
28dad2a5ca Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:31:17 +00:00
Eric Christopher
011c3f110b Implement EmitTBSSSymbol for MachOStreamer.
Fixes build failure as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:26:41 +00:00
Eric Christopher
4d01cbe93b Make EmitTBSSSymbol take a section argument so that we can find it later.
Fix up callers and users.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:16:04 +00:00
Jakob Stoklund Olesen
0eeb05c969 Properly handle multiple definitions of a virtual register in the same
instruction.

This can happen on ARM:

>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:10:50 +00:00
Evan Cheng
5012f9b825 Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 20:07:47 +00:00
Evan Cheng
27e4840e03 Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 20:03:28 +00:00
Kevin Enderby
9f2ad11624 Incorporate Daniel's suggestion and use !isdigit(CurPtr[0]) and not
CurPtr[0] == '\n' when testing the character after a "0b" when looking
to see if it part of a something like "jmp 0b".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 18:09:20 +00:00
Kevin Enderby
d8ba292c9b Fixed the problem with a branch to "0b" that was not parsed by llvm-mc
correctly.  The Lexer was incorrectly eating the newline casusing it to branch
to address 0.  Updated the test case to use a "0:" label and a branch to "0b".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104038 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:51:35 +00:00
Jakob Stoklund Olesen
6a8d2c6119 Teach the machine code verifier to use getSubRegisterRegClass().
The old approach was wrong. It had an off-by-one error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:31:12 +00:00
Daniel Dunbar
2ae4bfd769 MC/Mach-O: Implement support for setting indirect symbol table offset in section header.
Also, create symbol data for LHS of assignment, to match 'as' symbol ordering better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104033 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:28:24 +00:00
Daniel Dunbar
56279f42b6 MC/Mach-O: Remove some FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104032 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:28:20 +00:00
Daniel Dunbar
ca1212de59 MC/Mach-O: Fail faster/harder when we see .file, which isn't yet supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:28:17 +00:00
Daniel Dunbar
3f40b31256 MC/X86: Implement custom lowering to make sure we match things like
X86::ADC32ri $0, %eax
to
  X86::ADC32i32 $0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104030 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:22:24 +00:00
Daniel Dunbar
3538c808f8 llc (et al): Add support for --show-encoding and --show-inst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104029 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:22:19 +00:00
Dan Gohman
68e947ac61 Usage of O_NONBLOCK in bjam is now confirmed as a bug and fixed upstream.
Update the comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 15:25:14 +00:00
Benjamin Kramer
47f9a49560 Simplify MCContext::(Next|Get)Instance
- Allocate MCLabels in the context so they don't leak.
- Avoid duplicated densemap lookup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 12:15:34 +00:00
Evan Cheng
a083988c8a FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 00:03:40 +00:00
Jakob Stoklund Olesen
535af4a320 ARMBaseRegisterInfo::estimateRSStackSizeLimit() could return prematurely with a
too large limit.

The function would return immediately when finding an addrmode 3/5 instruction.
It needs to keep scanning in case there is an addrmode 6 instruction which drops
the limit to 0.

A test case is very difficult to produce because it will only fail when the
scavenger is used.

rdar://problem/7894847

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103995 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 23:29:23 +00:00
Evan Cheng
c6dcce3ba5 Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG_SEQUENCE instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 23:24:12 +00:00
Bill Wendling
53f7602b61 - Set the "HasCalls" flag after instruction selection is finished.
- Change the logic DisableFramePointerElim() to check for the
  -disable-non-leaf-fp-elim before -disable-fp-elim.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 23:09:50 +00:00
Kevin Enderby
ebe7fcd041 Added support in MC for Directional Local Labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 23:08:19 +00:00
Eric Christopher
c6177a4531 More data/parsing support for tls directives. Add a few more testcases
and cleanup comments as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 22:53:55 +00:00
Evan Cheng
44bfdd3d78 Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 22:09:49 +00:00
Evan Cheng
47006be498 vmov of immediates are trivially re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:54:50 +00:00
Daniel Dunbar
648ac5153e MC/Mach-O/x86: Optimal nop sequences should only be used for the .text sections, not all sections in the text segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:54:30 +00:00
Daniel Dunbar
9a744e3860 MC: Add dyn_cast support to MCSection.
- Of questionable utility, since in general anything which wants to do this should probably be within a target specific hook, which can rely on the sections being of the appropriate type. However, it can be useful for short term hacks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:54:26 +00:00
Daniel Dunbar
db9014dd8b MC/Mach-O: Reverse order of SymbolData scanning when emitting instructions.
- This fixes a string table mismatch with 'as' when two new symbols are defined
   in a single instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:19:59 +00:00
Jakob Stoklund Olesen
b8acb7be80 Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:02:08 +00:00
Eric Christopher
423c9e3e58 Add some section and constant support for darwin TLS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:02:07 +00:00
Evan Cheng
53c779bb3a Careful with reg_sequence coalescing to not to overwrite sub-register indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 20:57:12 +00:00
Bob Wilson
7f43fd84db Fix a regression in 464.h264 for thumb1 and thumb2 nightly tests.
Obvious in retrospect but not fun to debug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 20:31:13 +00:00
Daniel Dunbar
b18d2dd115 MC/Mach-O: Fix some differences in symbol flag handling.
- Don't clear weak reference flag, 'as' was only "trying" to do this, it wasn't
   actually succeeding.
 - Clear the "lazy bound" bit when we mark something external. This corresponds
   roughly to the lazy clearing of the bit that 'as' implements in
   symbol_table_lookup.
 - The exact meaning of these flags appears pretty loose, since 'as' isn't very
   consistent. For now we just try to match 'as', we will clean this up one day
   hopefully.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 20:12:31 +00:00
Jakob Stoklund Olesen
2997985b4c Remove debug option. Add comment on spill order determinism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103961 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 20:01:22 +00:00
Evan Cheng
6206124250 Turn on -neon-reg-sequence by default.
Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 19:51:20 +00:00