146742 Commits

Author SHA1 Message Date
Brian Gesiak
81e6d00cf5 lit: remove python2-isms
Summary:
`assert.assertItemEqual` went away in Python 3. Seeing how lists
are ordered, comparing a list against each other should work just
as well.

Patch by @jbergstroem (Johan Bergström).

Reviewers: modocache, gparker42

Reviewed By: modocache

Differential Revision: https://reviews.llvm.org/D31229



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298479 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 04:23:01 +00:00
Craig Topper
2612791ba8 [InstCombine] Teach SimplifyDemandedUseBits to shrink Constants on the left side of subtracts
Summary: Subtracts can have constants on the left side, but we don't shrink them based on demanded bits. This patch fixes that to match the right hand side.

Reviewers: davide, majnemer, spatel, sanjoy, hfinkel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31119

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298478 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 04:03:53 +00:00
Reid Kleckner
3c488ca5a4 [codeview] Use separate records for LF_SUBSTR_LIST and LF_ARGLIST
They are structurally the same, but now we need to distinguish them
because one record lives in the IPI stream and the other lives in TPI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298474 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 01:37:38 +00:00
Aditya Nandakumar
1b722a40ce [GlobalISel]: Create VREGs for ConstantInt args
This patch changes the behavior of IRTranslating intrinsics where we
now create VREG + G_CONSTANT for ConstantInt values. We already do this
for FloatingPoint values. This makes it easier for the backends to
select code and it won't have to de-duplicate creation+selection of
constants.

Reviewed by: ab

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298473 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 01:16:39 +00:00
Adrian Prantl
a284ce24c9 Don't compose DWARF expressions with multiple subregisters.
If a register location can only be described by a complex expression
(i.e., multiple subregisters) it doesn't safely compose with another
complex expression. For example, it is not possible to apply a
DW_OP_deref operation to multiple DW_OP_pieces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298472 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 01:16:01 +00:00
Adrian Prantl
5b1a3cb67c DwarfExpression: Defer emitting DWARF register operations
until the rest of the expression is known.

This is still an NFC refactoring in preparation of a subsequent bugfix.

This reapplies r298388 with a bugfix for non-physical frame registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298471 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 01:15:57 +00:00
Adam Nemet
5fead02594 Make test more robust
Set the flags on FAdd locally rather than assuming nothing will change it from
way earlier in the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298462 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 23:50:52 +00:00
Zachary Turner
d10b8de6de Resubmit "Improve StringMap iterator support."
The issue was trying to advance past the end of the iterator
when computing the end() iterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298461 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 23:45:03 +00:00
Ahmed Bougacha
a4a05c5804 [GlobalISel] Update DBG_VALUEs referencing DCE'd instructions.
Quentin points out that r298358 would cause us to emit different code
with debug info.  That's a big no-no; also erase the instructions that
only live thanks to DBG_VALUE users.

Adrian explained how this is an existing problem and an OK thing to do:
clang has allocas for all variables so shouldn't be affected at -O0, but
swift uses a bit of inlineasm to explicitly keep values live for the
purpose of debug info quality.  I'm not sure there is a better scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298460 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 23:42:54 +00:00
Ahmed Bougacha
de65337f18 [GlobalISel] Don't translate br to layout successor.
MI can represent fallthrough to layout successor blocks, and our
post-isel representation uses that extensively.

We might as well use it too, to avoid translating and carrying along
unnecessary branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298459 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 23:42:50 +00:00
Craig Topper
a28580d8ef [IR] Remove validAlignment and validPointer methods DataLayout as they aren't used.
I don't think validAlignment has been used since r34358 in 2007. I think validPointer was copied from validAlignment some time later, but it definitely wasn't used in the first commit that contained it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298458 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 23:04:23 +00:00
Matt Arsenault
956477d1ca AMDGPU: Remove hasSideEffects from SI_RETURN_TO_EPILOG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298454 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 22:28:48 +00:00
Tim Northover
9be3bb922a GlobalISel: respect BooleanContents when extending i1.
The world isn't just x86 & ARM, some targets need to store -1 into the byte
when legalizing a bool store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298453 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 22:22:05 +00:00
Matt Arsenault
dc55587b7f AMDGPU: Rename SI_RETURN
This is used for a specific type of return to a shader part's
epilog code. Rename to try avoiding confusion from a true
call's return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298452 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 22:18:10 +00:00
Matthias Braun
9c890fc5b3 SplitKit: Fix subreg copy related problems
Fix two problems related to r298025:
- SplitKit would create duplicate VNIs in some cases leading to crashs
  when hoisting copies.
- VirtRegMap could fail expanding copies at the beginning of a basic
  block.

This fixes http://llvm.org/PR32353

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298448 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 21:58:08 +00:00
Matt Arsenault
d706d030af AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298444 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 21:39:51 +00:00
Zachary Turner
123d0b8e82 Revert "Improve StringMap iterator support."
This is causing crashes in clang, so reverting until the problem
is figured out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298440 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 21:23:57 +00:00
Tim Northover
07435f1d78 GlobalISel: widen booleans by zero-extending to a byte.
A bool is represented by a single byte, which the ARM ABI requires to be either
0 or 1. So we cannot use G_ANYEXT when legalizing the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298439 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 21:12:04 +00:00
Zachary Turner
53bbec9603 Fix clang errors caused by StringMap iterator changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298437 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 20:41:51 +00:00
Zachary Turner
26bdd1d112 Improve StringMap iterator support.
StringMap's iterators did not support LLVM's
iterator_facade_base, which made it unusable in various
STL algorithms or with some of our range adapters.
This patch makes both StringMapConstIterator as well as
StringMapIterator support iterator_facade_base.

With this in place, it is easy to make an iterator adapter
that iterates over only keys, and whose value_type is
StringRef.  So I add StringMapKeyIterator as well, and
provide the method StringMap::keys() that returns a
range that can be iterated.

Differential Revision: https://reviews.llvm.org/D31171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298436 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 20:27:36 +00:00
Zachary Turner
bf2f3949e7 Remove eol-style:native from StringMap.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298435 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 20:21:56 +00:00
Sanjay Patel
0be9db9ff3 [InstCombine] regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298432 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 20:14:38 +00:00
George Burgess IV
3479ed63a6 Let llvm.objectsize be conservative with null pointers
This adds a parameter to @llvm.objectsize that makes it return
conservative values if it's given null.

This fixes PR23277.

Differential Revision: https://reviews.llvm.org/D28494


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298430 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 20:08:59 +00:00
Dehao Chen
287fe25641 Do not inline hot callsites for samplepgo in thinlto compile phase.
Summary: Because SamplePGO passes will be invoked twice in ThinLTO build: once at compile phase, the other at backend. We want to make sure the IR at the 2nd phase matches the hot part in profile, thus we do not want to inline hot callsites in the first phase.

Reviewers: tejohnson, eraman

Reviewed By: tejohnson

Subscribers: mehdi_amini, llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D31201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298428 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 19:55:36 +00:00
Zachary Turner
700f6ad142 [ADT] Add a version of llvm::join() that takes a range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298427 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 19:35:05 +00:00
Coby Tayree
1e509dc7d0 [X86][MS-compatability][llvm] allow MS TYPE/SIZE/LENGTH operators as a part of a compound expression
This patch introduces X86AsmParser with the ability to handle the aforementioned ops within compound "MS" arithmetical expressions.
Currently - only supported as a stand alone Operand, e.g.:
"TYPE X"
now allowed :
"4 + TYPE X * 128"

Clang side: https://reviews.llvm.org/D31174

Differential Revision: https://reviews.llvm.org/D31173


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298425 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 19:31:55 +00:00
Davide Italiano
3a3ac30679 [X86] Remove extra semicolon to placate GCC. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298423 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 19:17:23 +00:00
Artyom Skrobov
4a0582c127 [ARM] Recommit the glueless lowering of addc/adde in Thumb1,
including the amended (no UB anymore) fix for adding/subtracting -2147483648.

This reverts r298328 "[ARM] Revert r297443 and r297820."
and partially reverts r297842 "Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648""

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298417 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 18:39:41 +00:00
Zachary Turner
26ad506e7d Delete eol-style:native SVN property.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298415 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 18:31:08 +00:00
Dehao Chen
1f1b30ac8f Use ProfileSummary:getProfileCount to get ScaledCount for ModuleSummary
Summary: ModuleSummary should use the standard interface of ProfileSummary::getProfileCount.

Reviewers: eraman, tejohnson

Reviewed By: tejohnson

Subscribers: tejohnson, mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D31154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298404 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 17:22:35 +00:00
Adrian Prantl
2a9589584e Revert 298388 and 298389 because they broke some AMDGPU tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298401 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 17:14:30 +00:00
Krzysztof Parzyszek
32a326f95b Recommit r298282 with fixes for memory allocation/deallocation
[Hexagon] Recognize polynomial-modulo loop idiom again

Regain the ability to recognize loops calculating polynomial modulo
operation. This ability has been lost due to some changes in the
preceding optimizations. Add code to preprocess the IR to a form
that the pattern matching code can recognize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298400 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 17:09:27 +00:00
Reid Kleckner
3b53072816 Fix RST docs AttributeList heading underline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298398 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 17:05:00 +00:00
Marek Olsak
1f6c4f9203 AMDGPU: Buffer descriptor changes for GFX9
Reviewers: arsenm

Subscribers: qcolombet, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, dstuttard, tpr

Differential Revision: https://reviews.llvm.org/D31158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298397 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 17:00:39 +00:00
Marek Olsak
fe4c8daa0f AMDGPU: Always use VGPR indexing on GFX9
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, dstuttard, tpr

Differential Revision: https://reviews.llvm.org/D31157

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298396 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 17:00:32 +00:00
Krzysztof Parzyszek
cae50ec40d [Hexagon] Add -march=hexagon to a testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298395 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:59:40 +00:00
Reid Kleckner
6707770d48 Rename AttributeSet to AttributeList
Summary:
This class is a list of AttributeSetNodes corresponding the function
prototype of a call or function declaration. This class used to be
called ParamAttrListPtr, then AttrListPtr, then AttributeSet. It is
typically accessed by parameter and return value index, so
"AttributeList" seems like a more intuitive name.

Rename AttributeSetImpl to AttributeListImpl to follow suit.

It's useful to rename this class so that we can rename AttributeSetNode
to AttributeSet later. AttributeSet is the set of attributes that apply
to a single function, argument, or return value.

Reviewers: sanjoy, javed.absar, chandlerc, pete

Reviewed By: pete

Subscribers: pete, jholewinski, arsenm, dschuff, mehdi_amini, jfb, nhaehnle, sbc100, void, llvm-commits

Differential Revision: https://reviews.llvm.org/D31102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298393 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:57:19 +00:00
Matt Arsenault
45fb365cc4 AMDGPU: Fix not including v2i16/v2f16 in register class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298390 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:42:50 +00:00
Adrian Prantl
eb45ecd466 Don't compose DWARF expressions with multiple subregisters.
If a register location can only be described by a complex expression
(i.e., multiple subregisters) it doesn't safely compose with another
complex expression. For example, it is not possible to apply a
DW_OP_deref operation to multiple DW_OP_pieces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298389 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:37:39 +00:00
Adrian Prantl
3ba5a60c7b DwarfExpression: Defer emitting DWARF register operations
until the rest of the expression is known.

This is still an NFC refactoring in preparation of a subsequent bugfix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298388 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:37:35 +00:00
Matt Arsenault
b5f0660c6b AMDGPU: Fix asserting on 0 dmask for image intrinsics
Fold these to undef during lowering so users get eliminated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298387 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:32:17 +00:00
Matt Arsenault
b216ff22ea AMDGPU: Convert image intrinsic uses in tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298386 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:24:12 +00:00
Matt Arsenault
0597e5e3b0 DAG: Fold bitcast/extract_vector_elt of undef to undef
Fixes not eliminating store when intrinsic is lowered to undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298385 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:20:16 +00:00
Simon Pilgrim
b8fa10fdbf Fix shufpd test name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298381 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 15:12:53 +00:00
Sanne Wouda
94612f1d5f [ARM] [Assembler] Support negative immediates for A32, T32 and T16
Summary:
To support negative immediates for certain arithmetic instructions, the
instruction is converted to the inverse instruction with a negated (or inverted)
immediate. For example, "ADD r0, r1, #FFFFFFFF" cannot be encoded as an ADD
instruction.  However, "SUB r0, r1, #1" is equivalent.

These conversions are different from instruction aliases.  An alias maps
several assembler instructions onto one encoding.  A conversion, however, maps
an *invalid* instruction--e.g. with an immediate that cannot be represented in
the encoding--to a different (but equivalent) instruction.

Several instructions with negative immediates were being converted already, but
this was not systematically tested, nor did it cover all instructions.

This patch implements all possible substitutions for ARM, Thumb1 and
Thumb2 assembler and adds tests.  It also adds a feature flag
(-mattr=+no-neg-immediates) to turn these substitutions off.  This is
helpful for users who want their code to assemble to exactly what they
wrote.

Reviewers: t.p.northover, rovka, samparker, javed.absar, peter.smith, rengolin

Reviewed By: javed.absar

Subscribers: aadg, aemerson, llvm-commits

Differential Revision: https://reviews.llvm.org/D30571


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298380 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 14:59:17 +00:00
Yi Kong
656673e86d Test commit access
Remove some trailing whitespaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298379 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 14:49:19 +00:00
Sanjay Patel
1c3d706922 [InstCombine] auto-generate better checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298377 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 14:04:44 +00:00
Sanjay Patel
abbd326847 [x86] use PMOVMSK for vector-sized equality comparisons
We could do better by splitting any oversized type into whatever vector size the target supports, 
but I left that for future work if it ever comes up. The motivating case is memcmp() calls on 16-byte
structs, so I think we can wire that up with a TLI hook that feeds into this.

Differential Revision: https://reviews.llvm.org/D31156


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298376 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 13:50:33 +00:00
Simon Pilgrim
114c9e2aed [X86][AVX] Tests showing missing SHUFPD + ZERO lowering
This lowers to SHUFPD if the input is zeroinitializer but not with a demanded elts optimized build vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298370 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 13:30:40 +00:00
Valery Pykhtin
4b7cf6c175 [AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
Differential revision: https://reviews.llvm.org/D31046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298368 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 13:15:46 +00:00