146742 Commits

Author SHA1 Message Date
Simon Pilgrim
957caa243d Use MutableArrayRef for APFloat::convertToInteger
As discussed on D31074, use MutableArrayRef for destination integer buffers to help assert before stack overflows happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298253 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 14:40:12 +00:00
Maxim Ostapenko
c94df81328 [sancov] Fix broken links and displaced coloring in coverage-report-server.py
This patch fixes two issues:

* Fixed relative links to source files
* Enumeration of lines in source files starts from 1 instead of 0 to
  align with .symcov files generated by sancov -symbolize

Patch by Dmitiriy Nikiforov.

Differential Revision: https://reviews.llvm.org/D31038


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298250 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 14:06:04 +00:00
Simon Pilgrim
e2c895b9d6 Strip trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298249 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 13:55:35 +00:00
Simon Pilgrim
7d260e0718 Strip trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298248 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 13:54:44 +00:00
Simon Pilgrim
c74b1805ef Strip trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298247 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 13:53:59 +00:00
Konstantin Zhuravlyov
e50788dcb8 Revert "[AMDGPU] Run always inliner early in opt"
This reverts commit r297958, it breaks device-libs build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298239 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 09:26:08 +00:00
Craig Topper
09aeefe613 [IR] Move a few static functions in Instruction class inline.
They just check for certain opcodes and opcode enums are available in Instruction.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298237 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 06:40:39 +00:00
Michael Zolotukhin
63f2656869 [ConstantRange] Add setSizeSmallerThanOf method.
Summary:
ConstantRange class currently has a method getSetSize, which is mostly used to
compare set sizes of two constant ranges (there is only one spot where it's used
in a slightly different scenario). This patch introduces setSizeSmallerThanOf
method, which does such comparison in a more efficient way. In the original
method we have to extend our types to (BitWidth+1), which can result it using
slow case of APInt, extra memory allocations, etc.

The change is supposed to not change any functionality, but it slightly improves
compile time. Here is compile time improvements that I observed on CTMark:
* tramp3d-v4	-2.02%
* pairlocalalign	-1.82%
* lencod	-1.67%

Reviewers: sanjoy, atrick, pete

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31104

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298236 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 06:33:07 +00:00
Craig Topper
21a749ea8f [IR] Remove some unneeded includes from Operator.h and fix cpp files that were transitively depending on it. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298235 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 05:08:41 +00:00
Craig Topper
b36778a76f [IR] Add missing copyright header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298234 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 05:08:38 +00:00
Craig Topper
2d17f44587 [APInt] Don't initialize VAL to 0 in APInt constructors. Push it down to the initSlowCase and other init methods.
I'm not sure if zeroing VAL before writing pVal is really necessary, but at least one other place did it in code.

But by taking the store out of line, this reduces the opt binary by about 20k on my local x86-64 build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298233 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 01:29:52 +00:00
Xin Tong
f030d6b014 Remove unnecessary IDom check
Summary: This Idom check seems unnecessary. The immediate children of a node on the Dominator Tree should always be the IDom of its immediate children in this case.

Reviewers: hfinkel, majnemer, dberlin

Reviewed By: dberlin

Subscribers: dberlin, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D26954

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298232 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 00:30:19 +00:00
Craig Topper
9534108197 [InstCombine] Remove duplicate code in SimplifyDemandedUseBits for URem. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298231 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 21:45:57 +00:00
Craig Topper
4131f92ade [AVX-512] Handle kor/kand/kandn/kxor/kxnor/knot intrinsics at lowering time instead of isel
Summary:
Currently we handle these intrinsics at isel with special patterns. But as they just map to normal logic operations, we should just handle them at lowering. This will expose them to DAG combine optimizations. Right now the kor-sequence test generates a bunch of regclass copies between GR16 and VK16 that the peephole optimizer and/or register coallescing are removing to keep everything in the mask domain. By handling the logic op intrinsics earlier, these copies become bitcasts in the DAG and get removed by DAG combine which seems more robust.

This should help enable my plan to stop copying between K registers and GR8/GR16. The peephole optimizer can't remove a chain of copies between K and GR32 with insert_subreg/extract_subreg present in the chain so the kor-sequence test break. But this patch should dodge the problem entirely.

Reviewers: zvi, delena, RKSimon, igorb

Reviewed By: igorb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298228 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 17:11:09 +00:00
Craig Topper
bc9cb1ed06 [InstCombine] Use update_test_checks.py to regenerate a test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298227 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 17:04:52 +00:00
Simon Pilgrim
33e1fb27fd Fix constant folding of fp2int to large integers
We make the assumption in most of our constant folding code that a fp2int will target an integer of 128-bits or less, calling the APFloat::convertToInteger with only uint64_t[2] of raw bits for the result.

Fuzz testing (PR24662) showed that we don't handle other cases at all, resulting in stack overflows and all sorts of crashes.

This patch uses the APSInt version of APFloat::convertToInteger instead to better handle such cases.

Differential Revision: https://reviews.llvm.org/D31074

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298226 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:50:25 +00:00
Simon Pilgrim
d009ba9b3f Fix MSVC warning: "switch statement contains 'default' but no 'case' labels". NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298225 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:39:04 +00:00
Ahmed Bougacha
c86e4bce8e [GlobalISel] Don't select trivially dead instructions.
Folding instructions when selecting can cause them to become dead.
Don't select these dead instructions (if they don't have other side
effects, and don't define physical registers).

Preserve existing tests by adding COPYs.

In some tests, the G_CONSTANT vregs never get constrained to a class:
the only use of the vreg was folded into another instruction, so the
G_CONSTANT, now dead, never gets selected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298224 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:13:00 +00:00
Ahmed Bougacha
652ba98ae6 [GlobalISel][AArch64] Add DBG_VALUE select test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298223 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:12:53 +00:00
Ahmed Bougacha
1f669f9bb5 [GlobalISel][AArch64] Split out cast select tests. NFC.
And remove some redundant bitcast tests.

Also split the test functions themselves: it makes it obvious to see
what's tested where and what isn't, it makes the tests much easier to
read and manually update, and, most importantly, it makes them almost
trivial to update using tooling.  Yes, it's obnoxiously verbose, but
said tooling helps upgrade to better MIR syntax whenever available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298222 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:12:51 +00:00
Ahmed Bougacha
32431f2d21 [GlobalISel] Move method definition to the proper file. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298221 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:12:48 +00:00
Ahmed Bougacha
e80b226a12 [CodeGen] Update hasSideEffects comment. NFC.
We used to have 3 side effect flags, but as of r222809, we only have
hasSideEffects.  Change the comment to reflect that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298220 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:12:45 +00:00
Xin Tong
15605ca567 Correct a rebase mistake.
Left out AA in jumpthreading SimplifyPartiallyRedundantLoad

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298219 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 15:41:46 +00:00
Xin Tong
149f09bf35 Remove unused arguments. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298218 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 15:31:16 +00:00
Xin Tong
2fc03c9da3 [JumpThreading] Perform phi-translation in SimplifyPartiallyRedundantLoad.
Summary:
In case we are loading on a phi-load in SimplifyPartiallyRedundantLoad.
Try to phi translate it into incoming values in the predecessors before
we search for available loads.

This needs https://reviews.llvm.org/D30524

Reviewers: davide, sanjoy, efriedma, dberlin, rengolin

Reviewed By: dberlin

Subscribers: junbuml, llvm-commits

Differential Revision: https://reviews.llvm.org/D30543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298217 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 15:30:53 +00:00
Xin Tong
966ca1d295 Extract FindAvailablePtrLoadStore out of FindAvailableLoadedValue. NFCI
Summary:
Extract FindAvailablePtrLoadStore out of FindAvailableLoadedValue.
Prepare for upcoming change which will do phi-translation for load on
phi pointer in jump threading SimplifyPartiallyRedundantLoad.

This is in preparation for https://reviews.llvm.org/D30543

Reviewers: efriedma, sanjoy, davide, dberlin

Reviewed By: davide

Subscribers: junbuml, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D30524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298216 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 15:27:52 +00:00
Teresa Johnson
ad346a2a0c Enable stripping of multiple DILocation on !llvm.loop metadata
Summary:
I found that stripDebugInfo was still leaving significant amounts of
debug info due to !llvm.loop that contained DILocation after stripping.
The support for stripping debug info on !llvm.loop added in r293377 only
removes a single DILocation. Enhance that to remove all DILocation from
!llvm.loop.

Reviewers: hfinkel, aprantl, dsanders

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298213 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 13:54:57 +00:00
Oren Ben Simhon
c1d183262c [MIR] Test assumes x64 windows calling convention upon printing/parsing MIR output/input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298212 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 13:23:20 +00:00
Benjamin Kramer
4cd123aada [MIR] Add triple to test that assumes it runs on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298211 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 13:04:35 +00:00
Oren Ben Simhon
2c46aa5d72 CalleeSavedRegister was removed from MIR and is recalculated upon MIR parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298210 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 11:18:09 +00:00
Oren Ben Simhon
5d845d793d Moving the test to x86 because other architectures do not suport regcall calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298209 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 08:53:42 +00:00
Oren Ben Simhon
05383dbf2b [MIR] Support Customed Register Mask and CSRs
The MIR printer dumps a string that describe the register mask of a function.
A static predefined list of register masks matches a static list of strings.
However when the register mask is not from the static predefined list, there is no descriptor string and the printer fails.
This patch adds support to custom register mask printing and dumping.
Also the list of callee saved registers (describing the registers that must be preserved for the caller) might be dynamic.
As such this data needs to be dumped and parsed back to the Machine Register Info.

Differential Revision: https://reviews.llvm.org/D30971



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298207 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 08:14:18 +00:00
Craig Topper
0a70890b84 [InstCombine] Use setHighBits/setLowBits/setBitsFrom in place of getLowBitsSet/getHighBitsSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298204 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 05:49:16 +00:00
Brian Gesiak
6efc00369e [Analysis] bitreverse(undef) returns undef
Summary:
The reverse of an artbitrary bitpattern is also an arbitrary
bitpattern.

Reviewers: trentxintong, arsenm, majnemer

Reviewed By: majnemer

Subscribers: majnemer, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D31118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298201 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 04:40:42 +00:00
Daniel Berlin
27aadb1456 NewGVN: Now that we have a better verifier, we can prove that we can erase the predicateuser set each time we mark it touched
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298199 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 00:07:32 +00:00
Daniel Berlin
bc40428e38 NewGVN: Remove dead code (for now)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298198 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 00:07:27 +00:00
Craig Topper
f4d5d3972b [GVN] Fix accidental double storage of the function BasicBlock list in iterateOnFunction
Summary:
iterateOnFunction creates a ReversePostOrderTraversal object which does a post order traversal in its constructor and stores the results in an internal vector. Iteration over it just reads from the internal vector in reverse order.

The GVN code seems to be unaware of this and iterates over ReversePostOrderTraversal object and makes a copy of the vector into a local vector. (I think at one point in time we used a DFS here instead which would have required the local vector).

The net affect of this is that we have two vectors containing the basic block list. As I didn't want to expose the implementation detail of ReversePostOrderTraversal's constructor to GVN, I've changed the code to do an explicit post order traversal storing into the local vector and then reverse iterate over that.

I've also removed the reserve(256) since the ReversePostOrderTraversal wasn't doing that. I can add it back if we thinks it important. Though it seemed weird that it wasn't based on the size of the function.

Reviewers: davide, anemet, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298191 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 18:24:41 +00:00
Craig Topper
99e866c1f0 [ValueTracking] Remove deadish code from computeKnownBitsAddSub.
The code assigned to KnownZero, but later code unconditionally assigned over it. I'm pretty sure the later code can handle the same cases and more equally well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298190 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 18:21:46 +00:00
Daniel Berlin
14281a41e1 NewGVN: Greatly enhance the ability of the NewGVN verifier to detect
issues, subsuming previous verifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298188 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 15:41:40 +00:00
Daniel Berlin
174f2f4bda NewGVN: Fix PHI evaluation bug exposed by new verifier. We were checking whether the incoming block was reachable instead of whether the specific edge was reachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298187 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 15:41:36 +00:00
Daniel Berlin
d1843415cb DebugCounters: Add API for setting/unsetting programatically.
This is required so we can re-set the counter state for verifiers,
etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298186 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 15:41:13 +00:00
Matthias Braun
8ff4fe417f ExecutionDepsFix: Let targets specialize the pass; NFC
Let targets specialize the pass with the register class so we can get a
parameterless default constructor and can put the pass into the pass
registry to enable testing with -run-pass=.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298184 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 05:08:58 +00:00
Matthias Braun
76900ddfb6 ExecutionDepsFix: Normalize names; NFC
Normalize ExeDepsFix, execution-fix, ExecutionDependencyFix and
ExecutionDepsFix to the last one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298183 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 05:05:40 +00:00
Matthias Braun
6d61e5ce5b CodeGen.cpp: Sort alphabetically; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298182 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 05:05:32 +00:00
Matthias Braun
6012ab1560 InitializePasses.h: Cleanup; NFC
- Sort alphabetically
- Normalize spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298181 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 05:05:29 +00:00
Craig Topper
a48f3f3de2 [ValueTracking] Add APInt::setSignBit and use it to replace ORing with getSignBit which will malloc if the bit width is larger than 64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298180 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 04:01:29 +00:00
Nirav Dave
11fdc7845a Make library calls sensitive to regparm module flag (Fixes PR3997).
Reviewers: mkuper, rnk

Subscribers: mehdi_amini, jyknight, aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D27050

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298179 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 00:44:07 +00:00
Nirav Dave
c78bc912e4 Capitalize ArgListEntry fields. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298178 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 00:43:57 +00:00
Bruno Cardoso Lopes
ac657a19e0 [LockFileManager] Reduce lock timeout
Go back to behavior pre-r231309 and reduce the timeout from 8 to ~1.5
min now that we have (a) PCMCache mechanism (r298165) and (b) timeout
that doesn't cause a failure, but actually build the module (r298175).

rdar://problem/30297862

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298176 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 00:32:34 +00:00
Stanislav Mekhanoshin
ee8b410dd7 [AMDGPU] Add address space based alias analysis pass
This is direct port of HSAILAliasAnalysis pass, just cleaned for
style and renamed.

Differential Revision: https://reviews.llvm.org/D31103

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298172 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-17 23:56:58 +00:00