Commit Graph

145789 Commits

Author SHA1 Message Date
Zachary Turner
854f9fd147 [PDB] Add tests for BinaryStream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296555 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 01:03:53 +00:00
Adam Nemet
a3f7c6ad38 [opt-viewer] Suggest installing the faster parser (libYAML)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296553 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 00:54:40 +00:00
Ahmed Bougacha
fb5e79a577 [CodeGen] Remove dead FastISel code after SDAG emitted a tailcall.
When SDAGISel (top-down) selects a tail-call, it skips the remainder
of the block.

If, before that, FastISel (bottom-up) selected some of the (no-op) next
few instructions, we can end up with dead instructions following the
terminator (selected by SDAGISel).

We need to erase them, as we know they aren't necessary (in addition to
being incorrect).

We already do this when FastISel falls back on the tail-call itself.
Also remove the FastISel-emitted code if we fallback on the
instructions between the tail-call and the return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296552 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 00:43:42 +00:00
Ahmed Bougacha
7fdaba3e0f [GlobalISel] Replace all combined G_EXTRACT uses.
Iterating on the use-list we're modifying doesn't work: after the first
iteration, the use-list iterator will point to a MachineOperand
referencing the new register.  This caused us to skip the other uses to
replace.

Instead, use MRI.replaceRegWith(), which accounts for this behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296551 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 00:43:39 +00:00
Paul Robinson
12246fec03 Add missing module/license header. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296550 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-01 00:14:42 +00:00
Adam Nemet
2f28d0c7ba [opt-viewer] Handle column number 0
The asm-printer now emits remarks with function location which have
unspecified (0) source column number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296547 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:59:46 +00:00
Adam Nemet
d2478aa1d8 Revert "(HEAD, origin/master, origin/HEAD, master) [LV] These should missed remarks"
This reverts commit r296544.

This got committed by accident.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296546 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:54:27 +00:00
Adam Nemet
2a73470ef0 [LV] These should missed remarks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296544 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:48:58 +00:00
Adrian Prantl
56d0100cfa Teach the IR verifier to reject conflicting debug info for function arguments.
Conflicting debug info for function arguments causes hard-to-debug
assertions in the DWARF backend, so the Verifier should reject it.
For performance reasons this only checks function arguments from
non-inlined debug intrinsics for now.

rdar://problem/30520286

This reapplies r295749 after fixing PR32042.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296543 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:48:42 +00:00
Paul Robinson
28ca8c3c86 [DWARFv5] llvm-mc support for new unit header.
This is for running the assembler with -g (to emit DWARF describing
the assembler source).

Differential Revision: http://reviews.llvm.org/D30475


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296541 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:40:46 +00:00
Dan Gohman
24efa5d42e [WebAssembly] Convert the remaining unit tests to the new wasm-object-file target.
To facilitate this, add a new hidden command-line option to disable
the explicit-locals pass. That causes llc to emit invalid code that doesn't
have all locals converted to get_local/set_local, however it simplifies
testwriting in many cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296540 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:37:04 +00:00
Daniel Berlin
f5d4310169 Update AMDGPU test branch-relaxation.ll for changes after post-dom fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296539 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:35:24 +00:00
Eli Friedman
a918957b28 [ARM] Don't generate deprecated T1 STM.
This prevents generating stm r1!, {r0, r1} on Thumb1, where value
stored for r1 is UNKONWN.

Patch by Zhaoshi Zheng.

Differential Revision: https://reviews.llvm.org/D27910



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296538 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:32:55 +00:00
Krzysztof Parzyszek
b45bb28e1f [Hexagon] Generate extract instructions more aggressively
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296537 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:27:33 +00:00
Kostya Serebryany
27a5a29184 [libFuzzer] remove usage of the old coverage instrumentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296536 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:23:48 +00:00
Daniel Berlin
379e7c2248 Fix PR 24415 (at least), by making our post-dominator tree behavior sane.
Summary:
Currently, our post-dom tree tries to ignore and remove the effects of
infinite loops.  It fails miserably at this, because it tries to do it
ahead of time, and thus can only detect self-loops, and any other type
of infinite loop, it pretends doesn't exist at all.

This can, in a bunch of cases, lead to wrong answers and a completely
empty post-dom tree.

Wrong answer:

```
declare void foo()
define internal void @f() {
entry:
  br i1 undef, label %bb35, label %bb3.i

bb3.i:
  call void @foo()
  br label %bb3.i

bb35.loopexit3:
  br label %bb35

bb35:
  ret void
}
```
We get:
```
Inorder PostDominator Tree:
  [1]  <<exit node>> {0,7}
    [2] %bb35 {1,6}
      [3] %bb35.loopexit3 {2,3}
      [3] %entry {4,5}
```

This is a trivial modification of the testcase for PR 6047
Note that we pretend bb3.i doesn't exist.
We also pretend that bb35 post-dominates entry.

While it's true that it does not exit in a theoretical sense, it's not
really helpful to try to ignore the effect and pretend that bb35
post-dominates entry.  Worse, we pretend the infinite loop does
nothing (it's usually considered a side-effect), and doesn't even
exist, even when it calls a function.  Sadly, this makes it impossible
to use when you are trying to move code safely.  All compilers also
create virtual or real single exit nodes (including us), and connect
infinite loops there (which this patch does).  In fact, others have
worked around our behavior here, to the point of building their own
post-dom trees:
https://zneak.github.io/fcd/2016/02/17/structuring.html and pointing
out the region infrastructure is near-useless for them with postdom in
this state :(

Completely empty post-dom tree:
```
define void @spam() #0 {
bb:
  br label %bb1

bb1:                                              ; preds = %bb1, %bb
  br label %bb1

bb2:                                              ; No predecessors!
  ret void
}
```
Printing analysis 'Post-Dominator Tree Construction' for function 'foo':
=============================--------------------------------
Inorder PostDominator Tree:
  [1]  <<exit node>> {0,1}

:(

(note that even if you ignore the effects of infinite loops, bb2
should be present as an exit node that post-dominates nothing).

This patch changes post-dom to properly handle infinite loops and does
root finding during calculation to prevent empty tress in such cases.

We match gcc's (and the canonical theoretical) behavior for infinite
loops (find the backedge, connect it to the exit block).

Testcases coming as soon as i finish running this on a ton of random graphs :)

Reviewers: chandlerc, davide

Subscribers: bryant, llvm-commits

Differential Revision: https://reviews.llvm.org/D29705

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296535 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 22:57:50 +00:00
Peter Collingbourne
d2170754c4 gold-plugin: Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296533 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 22:40:30 +00:00
Krzysztof Parzyszek
3fa39c0a81 [Hexagon] Fix instruction selection for sign-extending i1 to i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296532 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 22:37:01 +00:00
Dean Michael Berris
7577713c9b [XRay][Docs] Update the XRay documentation
Summary:
Update the XRay docs to mention new subcomands to the llvm-xray tool,
and details on FDR mode logging. Also list down available libraries for
use part of the LLVM distribution.

Reviewers: rSerge, pelikan, echristo, timshen, sdardis, rengolin

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D30395

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296528 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 22:01:26 +00:00
Kevin Enderby
505b77004a Actually add error handling to unpacking the dyld compact bind and
other tables.  Providing a helpful error message to what the error is and
where the error occurred based on which opcode it was associated with.

There have been handful of bug fixes dealing with bad bind info in
object files, r294021 and r249845, which only put a band aid on the
problem after a bad bind table was created after unpacking from
its compact info.  In these cases a bind table should have never been
created and an error should have simply been generated.

This change puts in place the plumbing to allow checking and returning
of an error when the compact info is unpacked.  This follows the model
of iterators that can fail that Lang Hanes designed when fixing the problem
for bad archives r275316 (or r275361).

This change uses one of the existing test cases that now causes an
error instead of printing <<bad library ordinal>> after a bad bind table
is created.  The error uses the offset into the opcode table as shown with
the macOS dyldinfo(1) tool to indicate where the error is and which
opcode and which parameter is in error.

For example the exiting test case has this lazy binding opcode table:

% dyldinfo -opcodes test/tools/llvm-objdump/Inputs/bad-ordinal.macho-x86_64 
…
lazy binding opcodes:
0x0000 BIND_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB(0x02, 0x00000010)
0x0002 BIND_OPCODE_SET_DYLIB_ORDINAL_IMM(2)

In the test case the binary only has one library so setting the library 
ordinal to the value of 2 in the BIND_OPCODE_SET_DYLIB_ORDINAL_IMM
opcode at 0x0002 above is an error.  This now produces this error message:

% llvm-objdump -lazy-bind bad-ordinal.macho-x86_64 
…
llvm-objdump: 'bad-ordinal.macho-x86_64': truncated or malformed object (for BIND_OPCODE_SET_DYLIB_ORDINAL_ULEB bad library ordinal: 2 (max 1) for opcode at: 0x2)

This change provides the plumbing for the error handling and one example
of an error message.  Other error checks and test cases will be added in follow
on commits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296527 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 21:47:07 +00:00
Mehdi Amini
00684f5d0c Mark some libFuzzer tests as XFAIL'd on Darwin
We're bringing up a bot on Green Dragon right now:

http://green.lab.llvm.org/green/view/Experimental/job/libFuzzer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296526 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 21:45:59 +00:00
Matt Arsenault
1a0fc1885e AMDGPU: Fix types for VOP_I16_I16_I16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296523 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 21:31:45 +00:00
Matt Arsenault
743da63164 AMDGPU: Add definition for v_swap_b32
This is somewhat tricky because there are two
pairs of tied operands, and it isn't allowed to be
VOP3 encoded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296519 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 21:09:04 +00:00
Matt Arsenault
0911246281 AMDGPU: Add definition for v_xad_u32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296515 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 20:27:30 +00:00
Paul Robinson
77bf4a4c38 [DWARFv5] Emit new unit header format.
Requesting DWARF v5 will now get you the new compile-unit and
type-unit headers.  llvm-dwarfdump will also recognize them.

Differential Revision: http://reviews.llvm.org/D30206


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296514 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 20:24:55 +00:00
Matt Arsenault
c1a133abee AMDGPU: Add ds_nop to assembler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296513 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 20:15:46 +00:00
Matt Arsenault
efc7556475 AMDGPU: Add definitions for ds_{read|write}_b{96|128}
It's not clear to me if this is always better than
doing ds_write2_b64 This adds the constraint of
a 128-bit register input instead of a pair of
64-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296512 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 20:15:43 +00:00
Stanislav Mekhanoshin
0248798c22 [AMDGPU] Add second pass of the scheduler
If during scheduling we have identified that we cannot keep optimistic
occupancy increase critical register pressure limit and try scheduling
of the whole function again. In this case blocks with smaller pressure
will have a chance for better scheduling.

Differential Revision: https://reviews.llvm.org/D30442

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296506 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 19:20:33 +00:00
Sanjay Patel
0e267e802a [DAGCombiner] use dyn_cast values in foldSelectOfConstants(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296502 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 18:41:49 +00:00
Zachary Turner
584a5d174f Fix -Wcovered-switch-default warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296501 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 18:35:40 +00:00
Francis Visoiu Mistrih
114240abb9 [LCG] Fix EXPENSIVE_CHECKS typo. NFC
Differential Revision: https://reviews.llvm.org/D30434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296500 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 18:34:55 +00:00
Dehao Chen
e26c421c66 Add function importing info from samplepgo profile to the module summary.
Summary: For SamplePGO, the profile may contain cross-module inline stacks. As we need to make sure the profile annotation happens when all the hot inline stacks are expanded, we need to pass this info to the module importer so that it can import proper functions if necessary. This patch implemented this feature by emitting cross-module targets as part of function entry metadata. In the module-summary phase, the metadata is used to build call edges that points to functions need to be imported.

Reviewers: mehdi_amini, tejohnson

Reviewed By: tejohnson

Subscribers: davidxl, llvm-commits

Differential Revision: https://reviews.llvm.org/D30053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296498 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 18:09:44 +00:00
James Y Knight
f563b7840e Workaround MSVC bug when using TrailingObjects from a template.
MSVC appears to be getting confused as to whether OverloadToken is
supposed to be public or not.

This was discovered by code in Swift, and has been reported to
microsoft by hughbe:
https://connect.microsoft.com/VisualStudio/feedback/details/3116517

Differential Revision: https://reviews.llvm.org/D29880

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296497 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 18:05:41 +00:00
Sanjay Patel
9070606d47 [x86] add alternate IR tests for select of constants; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296496 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 18:02:38 +00:00
Zachary Turner
54a7acb455 [PDB] Add BinaryStreamError.
This migrates the stream code away from MSFError to using its
own custom Error class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296494 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 17:49:34 +00:00
Brad Smith
6bca79c2f9 Set default CPU for OpenBSD/arm to Cortex-A8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296493 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 17:28:35 +00:00
David Bozier
a786b77c39 Fix issue with test case. Make test x86_64 specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296492 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 17:25:38 +00:00
Stanislav Mekhanoshin
004075214e [AMDGPU] New method to estimate register pressure
This change introduces new method to estimate register pressure in
GCNScheduler. Standard RPTracker gives huge error due to the following
reasons:

1. It does not account for live-ins or live-outs if value is not used
in the region itself. That creates a huge error in a very common case
if there are a lot of live-thu registers.
2. It does not properly count subregs.
3. It assumes a register used as an input operand can be reused as an
output. This is not always possible by itself, this is not what RA
will finally do in many cases for various reasons not limited to RA's
inability to do so, and this is not so if the value is actually a
live-thu.

In addition we can now see clear separation between live-in pressure
which we cannot change with the scheduling and tentative pressure
which we can change.

Differential Revision: https://reviews.llvm.org/D30439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296491 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 17:22:39 +00:00
Konstantin Zhuravlyov
b1d063dce5 [AMDGPU] Change amd_kernel_code_t's minor version to 1
- We do emit amd_kernel_code_t v1.1

Differential Revision: https://reviews.llvm.org/D30433


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296489 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 17:17:52 +00:00
Adrian Prantl
9fa4de797e Strip debug info when inlining into a nodebug function.
The LLVM backend cannot produce any debug info for an llvm::Function
without a DISubprogram attachment. When inlining a debug-info-carrying
function into a nodebug function, there is therefore no reason to keep
any debug info intrinsic calls or debug locations on the instructions.

This fixes a problem discovered in PR32042.

rdar://problem/30679307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296488 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 16:58:13 +00:00
Vedant Kumar
09f10e7e60 [llvm-cov] Error-out when an unsupported format is used (PR32087)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296487 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 16:57:28 +00:00
Craig Topper
79e90c5570 [DAGISel] When checking if chain node is foldable, make sure the intermediate nodes have a single use across all results not just the result that was used to reach the chain node.
This recovers a test case that was severely broken by r296476, my making sure we don't create ADD/ADC that loads and stores when there is also a flag dependency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296486 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 16:52:05 +00:00
Stanislav Mekhanoshin
b57bf30b47 [AMDGPU] Fix read-undef flags when schedule is reverted
If two subregs of the same register are defined and we need to revert
schedule changing def order, we will end up with both instructions
having def,read-undef flags because adjustLaneLiveness() will only set
this flag but will not remove it.

Fix this by removing read-undef flags before calling adjustLaneLiveness.

Differential Revision: https://reviews.llvm.org/D30428

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296484 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 16:26:27 +00:00
David Bozier
3d50c64c92 [Stack Protection] Add diagnostic information for why stack protection was applied to a function
Stack Smash Protection is not completely free, so in hot code, the overhead it causes can cause performance issues. By adding diagnostic information for which functions have SSP and why, a user can quickly determine what they can do to stop SSP being applied to a specific hot function.

This change adds a remark that is reported by the stack protection code when an instruction or attribute is encountered that causes SSP to be applied.

Patch by: James Henderson

Differential Revision: https://reviews.llvm.org/D29023



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296483 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 16:02:37 +00:00
Simon Dardis
7569719e94 [mips] Fix 64bit slt/sltu/nor with immediates
Patch By: Alexander Richardson

Reviewers: atanasyan, theraven, sdardis

Differential Revision: https://reviews.llvm.org/D30330



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296482 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 15:55:23 +00:00
Daniel Sanders
1e598cbf73 Revert r296474 - [globalisel] Change LLT constructor string into an LLT subclass that knows how to generate it.
There's a circular dependency that's only revealed when LLVM_ENABLE_MODULES=1.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296478 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 15:00:27 +00:00
Nirav Dave
bfdb3f2a5a In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
Recommiting after fixup of 32-bit aliasing sign offset bug in DAGCombiner.

    * Simplify Consecutive Merge Store Candidate Search

    Now that address aliasing is much less conservative, push through
    simplified store merging search and chain alias analysis which only
    checks for parallel stores through the chain subgraph. This is cleaner
    as the separation of non-interfering loads/stores from the
    store-merging logic.

    When merging stores search up the chain through a single load, and
    finds all possible stores by looking down from through a load and a
    TokenFactor to all stores visited.

    This improves the quality of the output SelectionDAG and the output
    Codegen (save perhaps for some ARM cases where we correctly constructs
    wider loads, but then promotes them to float operations which appear
    but requires more expensive constant generation).

    Some minor peephole optimizations to deal with improved SubDAG shapes (listed below)

    Additional Minor Changes:

      1. Finishes removing unused AliasLoad code

      2. Unifies the chain aggregation in the merged stores across code
         paths

      3. Re-add the Store node to the worklist after calling
         SimplifyDemandedBits.

      4. Increase GatherAllAliasesMaxDepth from 6 to 18. That number is
         arbitrary, but seems sufficient to not cause regressions in
         tests.

      5. Remove Chain dependencies of Memory operations on CopyfromReg
         nodes as these are captured by data dependence

      6. Forward loads-store values through tokenfactors containing
          {CopyToReg,CopyFromReg} Values.

      7. Peephole to convert buildvector of extract_vector_elt to
         extract_subvector if possible (see
         CodeGen/AArch64/store-merge.ll)

      8. Store merging for the ARM target is restricted to 32-bit as
         some in some contexts invalid 64-bit operations are being
         generated. This can be removed once appropriate checks are
         added.

    This finishes the change Matt Arsenault started in r246307 and
    jyknight's original patch.

    Many tests required some changes as memory operations are now
    reorderable, improving load-store forwarding. One test in
    particular is worth noting:

      CodeGen/PowerPC/ppc64-align-long-double.ll - Improved load-store
      forwarding converts a load-store pair into a parallel store and
      a memory-realized bitcast of the same value. However, because we
      lose the sharing of the explicit and implicit store values we
      must create another local store. A similar transformation
      happens before SelectionDAG as well.

    Reviewers: arsenm, hfinkel, tstellarAMD, jyknight, nhaehnle

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296476 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 14:24:15 +00:00
Daniel Sanders
e0180ef4b8 [globalisel] Change LLT constructor string into an LLT subclass that knows how to generate it.
Summary:
This will allow future patches to inspect the details of the LLT. The implementation is now split between
the Support and CodeGen libraries to allow TableGen to use this class without introducing layering concerns.

Thanks to Ahmed Bougacha for finding a reasonable way to avoid the layering issue and providing the version of this patch without that problem.

Reviewers: t.p.northover, qcolombet, rovka, aditya_nandakumar, ab, javed.absar

Subscribers: arsenm, nhaehnle, mgorny, dberris, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296474 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 14:21:31 +00:00
Diana Picus
109b635928 [ARM] GlobalISel: Lower i32 and fp call parameters on the stack
Lower i32, float and double parameters that need to live on the stack. This
boils down to creating some G_GEPs starting from the stack pointer and storing
the values there. During the process we also keep track of the stack size and
use the final value in the ADJCALLSTACKDOWN/UP instructions.

We currently assert for smaller types, since they usually require extensions.
They will be handled in a separate patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296473 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 14:17:53 +00:00
Diana Picus
de6b1270fb [ARM] GlobalISel: Select 32-bit G_CONSTANT
Put it into a register by means of a MOVi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296471 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 13:05:42 +00:00