Commit Graph

4 Commits

Author SHA1 Message Date
Sam Kolton
e88fc4046f [AMDGPU] SDWA: add support for GFX9 in peephole pass
Summary:
Added support based on merged SDWA pseudo instructions. Now peephole allow one scalar operand, omod and clamp modifiers.
Added several subtarget features for GFX9 SDWA.
This diff also contains changes from D34026.
Depends D34026

Reviewers: vpykhtin, rampitec, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D34241

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305986 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 06:26:41 +00:00
Matt Arsenault
4923776ab2 AMDGPU: Start adding offset fields to flat instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305194 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-12 15:55:58 +00:00
Tim Northover
3fd4db31a7 MIR: update test for noVRegs removal.
I think I hadn't git pulled recently enough to bring it in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304250 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-30 22:02:19 +00:00
Stanislav Mekhanoshin
f0c3d71794 [AMDGPU] Allow SDWA in instructions with immediates and SGPRs
An encoding does not allow to use SDWA in an instruction with
scalar operands, either literals or SGPRs. That is however possible
to copy these operands into a VGPR first.

Several copies of the value are produced if multiple SDWA conversions
were done. To cleanup MachineLICM (to hoist copies out of loops),
MachineCSE (to remove duplicate copies) and SIFoldOperands (to replace
SGPR to VGPR copy with immediate copy right to the VGPR) runs are added
after the SDWA pass.

Differential Revision: https://reviews.llvm.org/D33583

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304219 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-30 16:49:24 +00:00