Commit Graph

13819 Commits

Author SHA1 Message Date
Duncan Sands
ba9934648f Speculatively revert commit 127478 (jsjodin) in an attempt to fix the
llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots.
The original log entry:
Remove optimization emitting a reference insted of label difference, since
it can create more relocations. Removed isBaseAddressKnownZero method,
because it is no longer used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12 13:07:37 +00:00
Owen Anderson
2ce5bf188d Teach FastISel to support register-immediate-immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127496 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11 21:33:55 +00:00
Jim Grosbach
2a09f878ef 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11 21:02:27 +00:00
Jim Grosbach
108e4dbecb Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11 20:59:19 +00:00
Jan Sjödin
e4f6d7461a Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11 19:37:02 +00:00
Rafael Espindola
f7fdad15d9 Add r127409 back now that the windows file was updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 18:33:29 +00:00
Jakob Stoklund Olesen
4b0e1f1278 Revert r127409 which broke all the Windows bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 18:01:43 +00:00
Rafael Espindola
7deb187736 Add support for MemoryBuffers that are not null terminated and add
support for creating buffers that cover only a part of a file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 16:10:30 +00:00
Che-Liang Chiou
2f5565d21c ptx: add the rest of special registers of ISA version 2.0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 04:05:57 +00:00
Jakob Stoklund Olesen
38f6bd0fc8 Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 01:21:58 +00:00
Devang Patel
6af531febe Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information.
It generates output that lools like

8 times line number info lost by Scalar Replacement of Aggregates (SSAUp) 
1 times line number info lost by Simplify well-known library calls 
12 times variable info lost by Jump Threading



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 00:21:25 +00:00
Evan Cheng
b0519e15f7 Re-commit 127368 and 127371. They are exonerated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 00:16:32 +00:00
Evan Cheng
02d7c92982 Revert 127368 and 127371 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 23:53:17 +00:00
Evan Cheng
0f24d49aca Restore the default implementation of getCrossCopyRegClass: no need for cross-regclass copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 23:15:40 +00:00
Evan Cheng
17adafc6c1 Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
flexible.

If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 22:47:38 +00:00
Jan Sjödin
d1cba8727a Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 18:44:41 +00:00
Jan Sjödin
01dff96461 Add constructors to MCElfStreamer and MCObjectStreamer to take an extra MCAssembler * argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127343 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 17:33:05 +00:00
Jan Sjödin
dd54ffda26 Add InitializeNativeAsmParser function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 17:25:46 +00:00
John McCall
cdc06fa3c7 Typo. Patch by arrowdodger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127256 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 18:01:22 +00:00
Chris Lattner
db04b81014 fix incorrect comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127252 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 16:59:03 +00:00
Justin Holewinski
c6f24f4086 PTX: Add intrinsic support for ntid, ctaid, and nctaid registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 14:10:18 +00:00
Jakob Stoklund Olesen
0d8ccaa5c8 Let shrinkToUses optionally return a list of now dead machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 23:29:10 +00:00
Eric Christopher
d756eceb83 Typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 22:48:16 +00:00
Cameron Zwarich
be2119e8e2 Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 21:56:36 +00:00
Duncan Sands
e54f64899f Often GCC can see that NumBuckets is zero here, resulting in a warning
about possibly swapped memset parameters.  Avoid the warning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 19:38:38 +00:00
Jim Grosbach
42daf912e0 Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 19:28:43 +00:00
Owen Anderson
6154f6c929 Use the correct LHS type when determining the legalization of a shift's RHS type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 18:29:47 +00:00
Argyrios Kyrtzidis
a36be82664 Try fixing mingw build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 05:35:01 +00:00
Argyrios Kyrtzidis
128ccbb8e5 Do a compiler check that we use one of the types from PointerUnion[N], instead of a runtime check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 01:30:20 +00:00
Nick Lewycky
d01f50f42c ConstantInt has some getters which return ConstantInt's or ConstantVector's of
the value splatted into every element. Extend this to getTrue and getFalse which
by providing new overloads that take Types that are either i1 or <N x i1>. Use
it in InstCombine to add vector support to some code, fixing PR8469!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-06 03:36:19 +00:00
Benjamin Kramer
88b0c6a59a Avoid zero-sized allocations when copying a fresh DenseMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 22:00:28 +00:00
Anton Korobeynikov
57caad7a33 Preliminary support for ARM frame save directives emission via MI flags.
This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 18:43:32 +00:00
Anton Korobeynikov
94c1b08033 Provide hooks to set MI flags in MachineInstrBuilder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 18:43:20 +00:00
Anton Korobeynikov
b5e16af9ea Some first rudimentary support for ARM EHABI: print exception table in "text mode".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 18:43:15 +00:00
Anton Korobeynikov
6dd97471c4 Add FrameSetup MI flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 18:43:04 +00:00
Anton Korobeynikov
6647b59c92 Shorten AsmPrinterFlags filed to accomodate for future Flags field
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 18:42:54 +00:00
Benjamin Kramer
49d443053b Lazily allocate DenseMaps.
This makes lookup slightly more expensive but it's worth it, unused
DenseMaps are common in LLVM code apparently.

1% speedup on clang -O3 bzip2.c
4% speedup on clang -O3 oggenc.c (Release build of clang on i386/linux)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 16:43:41 +00:00
Che-Liang Chiou
0df2c50c2b ptx: add basic intrinsic support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 14:17:37 +00:00
Andrew Trick
ece96f5713 Missing "virtual" keyword. Jakob's review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 08:39:45 +00:00
Andrew Trick
e0ef509aeb Increased the register pressure limit on x86_64 from 8 to 12
regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.

Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.

Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 08:00:22 +00:00
Jin-Gu Kang
1c5730faca test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 02:36:09 +00:00
Jim Grosbach
27ea9999e8 Teach the register scavenger to take subregs into account when finding a free register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 00:20:19 +00:00
Eric Christopher
515c67ee77 Support unregistering exception frames of functions when they are removed.
Patch by Johannes Schaub!

Fixes PR8548


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 23:37:39 +00:00
Jakob Stoklund Olesen
979869c28e Renumber slot indexes locally when possible.
Initially, slot indexes are quad-spaced. There is room for inserting up to 3
new instructions between the original instructions.

When we run out of indexes between two instructions, renumber locally using
double-spaced indexes. The original quad-spacing means that we catch up quickly,
and we only have to renumber a handful of instructions to get a monotonic
sequence. This is much faster than renumbering the whole function as we did
before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 19:43:38 +00:00
Jakob Stoklund Olesen
bee41501fa Symbolize the default instruction distance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 18:36:51 +00:00
Jakob Stoklund Olesen
beb9a1f9fd Deferred SlotIndex renumbering was a good idea but never used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 18:08:32 +00:00
Devang Patel
566bd12e54 Add ArrayRef variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 01:20:33 +00:00
Jakob Stoklund Olesen
13ba2dab63 Use an IndexedMap instead of a DenseMap for the live-out cache.
This speeds up updateSSA() so it only accounts for 5% of the live range
splitting time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126972 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 00:15:36 +00:00
Bill Wendling
e7147dba73 There are times when the landing pad won't have a call to 'eh.selector' in
it. It's been assumed up til now that it would be in its immediate
successor. However, this isn't necessarily the case. It could be in one of its
successor's successors.

Modify the code to more thoroughly check for an 'eh.selector' call in
successors. It only looks at a successor if we get there as a result of an
unconditional branch.

Testcase ObjC/exceptions-4.m in r126968.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-03 23:14:05 +00:00
Jim Grosbach
0f657b156f Allow a target to choose whether to prefer the scavenger emergency spill slot
be next to the frame pointer or the stack pointer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126956 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-03 20:01:52 +00:00