Commit Graph

1479 Commits

Author SHA1 Message Date
Tanya Lattner
6263f94674 Remove llvm-upgrade.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47238 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-17 20:02:20 +00:00
Andrew Lenharth
22c5c1b2df llvm.memory.barrier, and impl for x86 and alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-16 01:24:58 +00:00
Evan Cheng
de7f560744 This test is not interesting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-15 23:06:21 +00:00
Chris Lattner
423be627e6 Fix a miscompilation from Dan's recent apintification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 18:48:56 +00:00
Chris Lattner
8b0cb7bcc6 This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47106 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 05:39:46 +00:00
Evan Cheng
5598b70a78 Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47102 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 01:32:53 +00:00
Duncan Sands
d462ba8539 Teach LegalizeTypes how to expand and promote CTLZ,
CTTZ and CTPOP.  The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it.  I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it.  The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select.  This also means the value doesn't
need to be zero extended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47075 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 18:01:53 +00:00
Chris Lattner
86ca3cacc5 In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel.  Previously we would lower it in
legalize.  The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them.  This causes us to miss some optimizations because 
datatype expansion also happens here.

Exposing the loads early allows us to do optimizations on them.  For example
we now compile arg-cast.ll to:

_foo:
	movl	$2147483647, %eax
	andl	8(%esp), %eax
	ret

where we previously produced:

_foo:
	subl	$12, %esp
	movsd	16(%esp), %xmm0
	movsd	%xmm0, (%esp)
	movl	$2147483647, %eax
	andl	4(%esp), %eax
	addl	$12, %esp
	ret

It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 07:39:09 +00:00
Nate Begeman
5e1dd5597e Add testcase for recent legalizer change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47049 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 06:48:40 +00:00
Evan Cheng
b2e72b0feb New tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47047 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 03:23:53 +00:00
Evan Cheng
073c5b721d Don't mask the isel bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47018 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 19:11:29 +00:00
Evan Cheng
aeb231cb59 This test assumes no SSE4.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 19:11:08 +00:00
Evan Cheng
65b2e3df0d Fix some test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46998 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 07:22:46 +00:00
Evan Cheng
431bfcbe37 Determine whether a spill kills the register it's spilling before insertion rather than trying to undo the kill marker afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46953 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-11 08:30:52 +00:00
Dale Johannesen
b3c4eb46d6 Alignment of struct containing vectors depends on
whether SSE is present, on Darwin anyway.  Make it
explicit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46909 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-09 19:04:25 +00:00
Evan Cheng
5fd79d0560 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-08 21:20:40 +00:00
Evan Cheng
33663fc104 Added missing entries in X86 load / store folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46866 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-08 00:12:56 +00:00
Evan Cheng
be3bf42331 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
Evan Cheng
b745e88bf0 It's PR1925, not PR1609.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46825 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-06 22:07:17 +00:00
Evan Cheng
2fc628d662 Fix a number of local register allocator issues: PR1609.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46821 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-06 19:16:53 +00:00
Evan Cheng
a58891ff1e Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46776 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-05 22:50:29 +00:00
Evan Cheng
bb4151bd1f If a vr is already marked alive in a bb, then it has PHI uses that are visited earlier, then it is not killed in the def block (i.e. not dead).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46763 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-05 20:04:18 +00:00
Duncan Sands
6cc24947b6 Crashes LegalizeTypes with "Do not know how to
expand the result of this operator!" (node: ctlz).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46713 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 18:07:02 +00:00
Duncan Sands
06418c5610 Crashes LegalizeTypes with "Do not know how to split
this operator's operand" (node: extract_subvector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46712 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 18:05:42 +00:00
Chris Lattner
003de9a81e remove target triple to make this test more "generic"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46711 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 18:02:37 +00:00
Duncan Sands
df3fb5ef97 Crashed the new type legalizer. Not likely to catch
any bugs in the future since to get the crash you also
need hacked in fake libcall support (which creates odd
but legal trees), but since adding it doesn't hurt...
Thanks to Chris for this ultimately reduced version.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 09:40:27 +00:00
Lauro Ramos Venancio
859efca7f9 CBackend: Implement unaligned load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46646 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-01 21:25:59 +00:00
Chris Lattner
7cf9abff23 Add target triples to these so they don't fail on linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46496 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29 06:26:07 +00:00
Scott Michel
053c1da8d9 Overhaul Cell SPU's addressing mode internals so that there are now
only two addressing mode nodes, SPUaform and SPUindirect (vice the
three previous ones, SPUaform, SPUdform and SPUxform). This improves
code somewhat because we now avoid using reg+reg addressing when
it can be avoided. It also simplifies the address selection logic,
which was the main point for doing this.

Also, for various global variables that would be loaded using SPU's
A-form addressing, prefer D-form offs[reg] addressing, keeping the
base in a register if the variable is used more than once.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29 02:16:57 +00:00
Chris Lattner
15c2351a93 Update this test. Due to dag combiner improvements, we now compile
f7/f11 to:

_f7:
	eor r0, r0, #2, 2 @ -2147483648
	bx lr
_f11:
	bic r0, r0, #2, 2 @ -2147483648
	bx lr

instead of:

_f7:
	fmsr s0, r0
	fnegs s0, s0
	fmrs r0, s0
	bx lr

_f11:
	fmsr s0, r0
	fabss s0, s0
	fmrs r0, s0
	bx lr



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46423 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-27 23:26:37 +00:00
Chris Lattner
3bd39d4ca8 Implement some dag combines that allow doing fneg/fabs/fcopysign in integer
registers if used by a bitconvert or using a bitconvert.  This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway.  For example, we now 
compile CodeGen/X86/fp-in-intregs.ll to:

_test1:
	movl	$2147483648, %eax
	xorl	4(%esp), %eax
	ret
_test2:
	movl	$1065353216, %eax
	orl	4(%esp), %eax
	andl	$3212836864, %eax
	ret

Instead of:
_test1:
	movss	4(%esp), %xmm0
	xorps	LCPI2_0, %xmm0
	movd	%xmm0, %eax
	ret
_test2:
	movss	4(%esp), %xmm0
	andps	LCPI3_0, %xmm0
	movss	LCPI3_1, %xmm1
	andps	LCPI3_2, %xmm1
	orps	%xmm0, %xmm1
	movd	%xmm1, %eax
	ret

bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46414 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-27 17:42:27 +00:00
Chris Lattner
b8f43875c3 New test to verify that "merging 4 loads into a vec load" continues to work and
continues to infer alignment info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46403 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 20:06:45 +00:00
Chris Lattner
1329cb8d89 Infer alignment of loads and increase their alignment when we can tell they are
from the stack.  This allows us to compile stack-align.ll to:

_test:
	movsd	LCPI1_0, %xmm0
	movapd	%xmm0, %xmm1
***	andpd	4(%esp), %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret

instead of:

_test:
	movsd	LCPI1_0, %xmm0
**	movsd	4(%esp), %xmm1
**	andpd	%xmm0, %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46401 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 19:45:50 +00:00
Chris Lattner
216f3f6522 remove a useless xfailed test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46400 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 19:35:46 +00:00
Bill Wendling
824a721560 If there's no instructions being emitted on X86 for a function, emit a
nop. Emit the nop directly for PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46398 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 09:03:52 +00:00
Bill Wendling
c79348d8dc Need to convert to LLVM code and not C.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46397 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 06:56:08 +00:00
Bill Wendling
cd76af4a62 Rename the .c to .ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46396 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 06:53:40 +00:00
Bill Wendling
f7214bca74 Move testcase to the code gen directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46395 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 06:53:06 +00:00
Chris Lattner
5eee427594 Fix some bugs in SimplifyNodeWithTwoResults where it would call deletenode to
delete a node even if it was not dead in some cases.  Instead, just add it to
the worklist.  Also, make sure to use the CombineTo methods, as it was doing
things that were unsafe: the top level combine loop could touch dangling memory.

This fixes CodeGen/Generic/2008-01-25-dag-combine-mul.ll



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46384 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 01:09:19 +00:00
Chris Lattner
af723b9ae4 Add target-specific dag combines for FAND(x,0) and FOR(x,0). This allows
us to compile:

double test(double X) {
  return copysign(0.0, X);
}

into:

_test:
	andpd	LCPI1_0(%rip), %xmm0
	ret

instead of:
_test:
	pxor	%xmm1, %xmm1
	andpd	LCPI1_0(%rip), %xmm1
	movapd	%xmm0, %xmm2
	andpd	LCPI1_1(%rip), %xmm2
	movapd	%xmm1, %xmm0
	orpd	%xmm2, %xmm0
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-25 05:46:26 +00:00
Chris Lattner
d43d00cf3a Significantly simplify and improve handling of FP function results on x86-32.
This case returns the value in ST(0) and then has to convert it to an SSE
register.  This causes significant codegen ugliness in some cases.  For 
example in the trivial fp-stack-direct-ret.ll testcase we used to generate:

_bar:
	subl	$28, %esp
	call	L_foo$stub
	fstpl	16(%esp)
	movsd	16(%esp), %xmm0
	movsd	%xmm0, 8(%esp)
	fldl	8(%esp)
	addl	$28, %esp
	ret

because we move the result of foo() into an XMM register, then have to
move it back for the return of bar.

Instead of hacking ever-more special cases into the call result lowering code
we take a much simpler approach: on x86-32, fp return is modeled as always 
returning into an f80 register which is then truncated to f32 or f64 as needed.
Similarly for a result, we model it as an extension to f80 + return.

This exposes the truncate and extensions to the dag combiner, allowing target
independent code to hack on them, eliminating them in this case.  This gives 
us this code for the example above:

_bar:
	subl	$12, %esp
	call	L_foo$stub
	addl	$12, %esp
	ret

The nasty aspect of this is that these conversions are not legal, but we want
the second pass of dag combiner (post-legalize) to be able to hack on them.
To handle this, we lie to legalize and say they are legal, then custom expand
them on entry to the isel pass (PreprocessForFPConvert).  This is gross, but
less gross than the code it is replacing :)

This also allows us to generate better code in several other cases.  For 
example on fp-stack-ret-conv.ll, we now generate:

_test:
	subl	$12, %esp
	call	L_foo$stub
	fstps	8(%esp)
	movl	16(%esp), %eax
	cvtss2sd	8(%esp), %xmm0
	movsd	%xmm0, (%eax)
	addl	$12, %esp
	ret

where before we produced (incidentally, the old bad code is identical to what
gcc produces):

_test:
	subl	$12, %esp
	call	L_foo$stub
	fstpl	(%esp)
	cvtsd2ss	(%esp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	16(%esp), %eax
	movsd	%xmm0, (%eax)
	addl	$12, %esp
	ret

Note that we generate slightly worse code on pr1505b.ll due to a scheduling 
deficiency that is unrelated to this patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-24 08:07:48 +00:00
Chris Lattner
7323999b31 take these with a pr #
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46303 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-24 06:35:44 +00:00
Evan Cheng
2928650262 Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46286 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-23 23:17:41 +00:00
Evan Cheng
2cbdd27305 SSE varargs arguments are passed in memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46262 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-22 23:26:53 +00:00
Dale Johannesen
5c5eb80255 Implement flt_rounds for PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46174 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18 19:55:37 +00:00
Chris Lattner
994d6cfb3d remove extraneous &&'s from tests, as Scott is apparently not going to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46173 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18 19:53:43 +00:00
Dale Johannesen
9929207fde Test is correct again for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46172 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18 19:53:31 +00:00
Chris Lattner
a7a02fb828 Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:
_test:
	fctiwz f0, f1
	stfiwx f0, 0, r4
	blr 

instead of:

_test:
	fctiwz f0, f1
	stfd f0, -8(r1)
	nop
	nop
	lwz r2, -4(r1)
	stb r2, 0(r4)
	blr 

The former is not correct (stores 4 bytes, not 1).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46161 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18 16:54:56 +00:00
Scott Michel
58c5818c01 Forward progress: crtbegin.c now compiles successfully!
Fixed CellSPU's A-form (local store) address mode, so that all globals,
externals, constant pool and jump table symbols are now wrapped within
a SPUISD::AFormAddr pseudo-instruction. This now identifies all local
store memory addresses, although it requires a bit of legerdemain during
instruction selection to properly select loads to and stores from local
store, properly generating "LQA" instructions.

Also added mul_ops.ll test harness for exercising integer multiplication.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46142 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 20:38:41 +00:00
Chris Lattner
ddf89566a9 This commit changes:
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 19:59:44 +00:00