Commit Graph

88882 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith
41e362dd89 Reapply "ValueMapper: Treat LocalAsMetadata more like function-local Values"
This reverts commit r265765, reapplying r265759 after changing a call from
LocalAsMetadata::get to ValueAsMetadata::get (and adding a unit test).  When a
local value is mapped to a constant (like "i32 %a" => "i32 7"), the new debug
intrinsic operand may no longer be pointing at a local.

    http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/19020/

The previous coommit message follows:

--

This is a partial re-commit -- maybe more of a re-implementation -- of
r265631 (reverted in r265637).

This makes RF_IgnoreMissingLocals behave (almost) consistently between
the Value and the Metadata hierarchy.  In particular:

  - MapValue returns nullptr or "metadata !{}" for missing locals in
    MetadataAsValue/LocalAsMetadata bridging paris, depending on
    the RF_IgnoreMissingLocals flag.

  - MapValue doesn't memoize LocalAsMetadata-related results.

  - MapMetadata no longer deals with LocalAsMetadata or
    RF_IgnoreMissingLocals at all.  (This wasn't in r265631 at all, but
    I realized during testing it would make the patch simpler with no
    loss of generality.)

r265631 went too far, making both functions universally ignore
RF_IgnoreMissingLocals.  This broke building (e.g.) compiler-rt.
Reassociate (and possibly other passes) don't currently maintain
dominates-use invariants for metadata operands, resulting in IR like
this:

    define void @foo(i32 %arg) {
      call void @llvm.some.intrinsic(metadata i32 %x)
      %x = add i32 1, i32 %arg
    }

If the inliner chooses to inline @foo into another function, then
RemapInstruction will call `MapValue(metadata i32 %x)` and assert that
the return is not nullptr.

I've filed PR27273 to add a Verifier check and fix the underlying
problem in the optimization passes.

As a workaround, return `!{}` instead of nullptr for unmapped
LocalAsMetadata when RF_IgnoreMissingLocals is unset.  Otherwise, match
the behaviour of r265631.

Original commit message:

    ValueMapper: Make LocalAsMetadata match function-local Values

    Start treating LocalAsMetadata similarly to function-local members of
    the Value hierarchy in MapValue and MapMetadata.

      - Don't memoize them.
      - Return nullptr if they are missing.

    This also cleans up ConstantAsMetadata to stop listening to the
    RF_IgnoreMissingLocals flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265768 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 03:13:22 +00:00
Duncan P. N. Exon Smith
50c7f32d75 Revert "ValueMapper: Treat LocalAsMetadata more like function-local Values"
This reverts commit r265759, since even this limited version breaks some
bots:
  http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/3311
  http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/17696

This also reverts r265761 "ValueMapper: Unduplicate
RF_NoModuleLevelChanges check, NFC", since I had trouble separating it
from r265759.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265765 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:56:21 +00:00
Quentin Colombet
6831b38fa2 [TargetRegisterInfo] Re-apply r265734.
Original commit message:
[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265764 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:51:00 +00:00
Sanjoy Das
c9e3e3cbfd Don't IPO over functions that can be de-refined
Summary:
Fixes PR26774.

If you're aware of the issue, feel free to skip the "Motivation"
section and jump directly to "This patch".

Motivation:

I define "refinement" as discarding behaviors from a program that the
optimizer has license to discard.  So transforming:

```
void f(unsigned x) {
  unsigned t = 5 / x;
  (void)t;
}
```

to

```
void f(unsigned x) { }
```

is refinement, since the behavior went from "if x == 0 then undefined
else nothing" to "nothing" (the optimizer has license to discard
undefined behavior).

Refinement is a fundamental aspect of many mid-level optimizations done
by LLVM.  For instance, transforming `x == (x + 1)` to `false` also
involves refinement since the expression's value went from "if x is
`undef` then { `true` or `false` } else { `false` }" to "`false`" (by
definition, the optimizer has license to fold `undef` to any non-`undef`
value).

Unfortunately, refinement implies that the optimizer cannot assume
that the implementation of a function it can see has all of the
behavior an unoptimized or a differently optimized version of the same
function can have.  This is a problem for functions with comdat
linkage, where a function can be replaced by an unoptimized or a
differently optimized version of the same source level function.

For instance, FunctionAttrs cannot assume a comdat function is
actually `readnone` even if it does not have any loads or stores in
it; since there may have been loads and stores in the "original
function" that were refined out in the currently visible variant, and
at the link step the linker may in fact choose an implementation with
a load or a store.  As an example, consider a function that does two
atomic loads from the same memory location, and writes to memory only
if the two values are not equal.  The optimizer is allowed to refine
this function by first CSE'ing the two loads, and the folding the
comparision to always report that the two values are equal.  Such a
refined variant will look like it is `readonly`.  However, the
unoptimized version of the function can still write to memory (since
the two loads //can// result in different values), and selecting the
unoptimized version at link time will retroactively invalidate
transforms we may have done under the assumption that the function
does not write to memory.

Note: this is not just a problem with atomics or with linking
differently optimized object files.  See PR26774 for more realistic
examples that involved neither.

This patch:

This change introduces a new set of linkage types, predicated as
`GlobalValue::mayBeDerefined` that returns true if the linkage type
allows a function to be replaced by a differently optimized variant at
link time.  It then changes a set of IPO passes to bail out if they see
such a function.

Reviewers: chandlerc, hfinkel, dexonsmith, joker.eph, rnk

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18634

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265762 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:48:30 +00:00
Duncan P. N. Exon Smith
86c8abfe54 ValueMapper: Unduplicate RF_NoModuleLevelChanges check, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265761 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:41:10 +00:00
Adrian Prantl
11a3cfb7db DwarfDebug: Support floating point constants in location lists.
This patch closes a gap in the DWARF backend that caused LLVM to drop
debug info for floating point variables that were constant for part of
their scope. Floating point constants are emitted as one or more
DW_OP_constu joined via DW_OP_piece.

This fixes a regression caught by the LLDB testsuite that I introduced
in r262247 when we stopped blindly expanding the range of singular
DBG_VALUEs to span the entire scope and started to emit location lists
with accurate ranges instead.

Also deletes a now-impossible testcase (debug-loc-empty-entries).

<rdar://problem/25448338>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265760 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:38:37 +00:00
Duncan P. N. Exon Smith
698c0a7097 ValueMapper: Treat LocalAsMetadata more like function-local Values
This is a partial re-commit -- maybe more of a re-implementation -- of
r265631 (reverted in r265637).

This makes RF_IgnoreMissingLocals behave (almost) consistently between
the Value and the Metadata hierarchy.  In particular:

  - MapValue returns nullptr or "metadata !{}" for missing locals in
    MetadataAsValue/LocalAsMetadata bridging paris, depending on
    the RF_IgnoreMissingLocals flag.

  - MapValue doesn't memoize LocalAsMetadata-related results.

  - MapMetadata no longer deals with LocalAsMetadata or
    RF_IgnoreMissingLocals at all.  (This wasn't in r265631 at all, but
    I realized during testing it would make the patch simpler with no
    loss of generality.)

r265631 went too far, making both functions universally ignore
RF_IgnoreMissingLocals.  This broke building (e.g.) compiler-rt.
Reassociate (and possibly other passes) don't currently maintain
dominates-use invariants for metadata operands, resulting in IR like
this:

    define void @foo(i32 %arg) {
      call void @llvm.some.intrinsic(metadata i32 %x)
      %x = add i32 1, i32 %arg
    }

If the inliner chooses to inline @foo into another function, then
RemapInstruction will call `MapValue(metadata i32 %x)` and assert that
the return is not nullptr.

I've filed PR27273 to add a Verifier check and fix the underlying
problem in the optimization passes.

As a workaround, return `!{}` instead of nullptr for unmapped
LocalAsMetadata when RF_IgnoreMissingLocals is unset.  Otherwise, match
the behaviour of r265631.

Original commit message:

    ValueMapper: Make LocalAsMetadata match function-local Values

    Start treating LocalAsMetadata similarly to function-local members of
    the Value hierarchy in MapValue and MapMetadata.

      - Don't memoize them.
      - Return nullptr if they are missing.

    This also cleans up ConstantAsMetadata to stop listening to the
    RF_IgnoreMissingLocals flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265759 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:33:44 +00:00
Quentin Colombet
0967580994 Revert "[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator."
This reverts commit r265734.
Looks like ASan is not happy about it.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/11741

Looking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265755 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:03:51 +00:00
Quentin Colombet
9178a0cc6c [RegisterBankInfo] Make the debug output more compact.
Print the mask of the partial mapping as an hexadecimal instead of a
binary value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265754 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:03:49 +00:00
Davide Italiano
a63892db7c [IR/Verifier] Fix (yet another) crash.
We need to check that if we reference a retainedType from
DICompileUnit we're actually referencing a DICompositeType.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265752 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 00:01:32 +00:00
Quentin Colombet
2a2fe8fcd2 [RegBankSelect] Add a few debug statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265749 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 23:53:55 +00:00
Quentin Colombet
437de15fe9 [RegisterBankInfo] Add print and dump method to the InstructionMapping
helper class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265747 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 23:31:58 +00:00
Quentin Colombet
b80cd97269 [RegisterBankInfo] Add print and dump method to the ValueMapping helper
class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265746 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 23:25:43 +00:00
Quentin Colombet
818c860694 [MachineInstr] Teach the print method about RegisterBank.
Properly print either the register class or the register bank or a
virtual register.
Get rid of a few ifdefs in the process.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265745 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 23:18:11 +00:00
Quentin Colombet
a64b049ae0 [AArch64] Fix a typo in the register class to register bank mapping.
For GPR family we want the GPR register bank, not FPR!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265743 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 23:10:14 +00:00
Quentin Colombet
90905a009c [RegisterBankInfo] Strengthen getInstrMappingImpl.
Teach the target independent code how to take advantage of type
information to get the mapping of an instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265739 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 22:52:49 +00:00
Quentin Colombet
cea52301d3 [RegisterBankInfo] Add a way to record what register bank covers a
specific type.

This will be used to find the default mapping of the instruction.
Also, this information is recorded, instead of computed, because it is
expensive from a type to know which register bank maps it.
Indeed, we need to iterate through all the register classes of all the
register banks to find the one that maps the given type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265736 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 22:45:42 +00:00
Quentin Colombet
15fb12b7eb [RegisterBankInfo] Introduce getRegBankFromConstraints as an helper
method.

NFC.

The refactoring intends to make the code more readable and expose
more features to potential derived classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265735 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 22:35:03 +00:00
Quentin Colombet
4bb9de38d4 [TargetRegisterInfo] Refactor the code to use BitMaskClassIterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265734 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 22:16:56 +00:00
Quentin Colombet
83d385d6dd [RegisterBankInfo] Refactor the code to use BitMaskClassIterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265733 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 22:08:56 +00:00
Mehdi Amini
ca358261f0 Const correctness for BranchProbabilityInfo (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265731 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 21:59:28 +00:00
Mehdi Amini
33f3a04a6b Rename parameter I to Index for WriteCombinedGlobalValueSummary() (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265729 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 21:49:31 +00:00
Quentin Colombet
7880f4315b [RegBankSelect] Reuse RegisterBankInfo logic to get to the register bank
from a register.
On top of duplicating the logic, it was buggy! It would assert on
physical registers, since MachineRegisterInfo does not have any
information regarding register classes/banks for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265727 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 21:32:23 +00:00
Amaury Sechet
a5bbcb54ad Do not select EhPad BB in MachineBlockPlacement when there is regular BB to schedule
Summary:
EHPad BB are not entered the classic way and therefor do not need to be placed after their predecessors. This patch make sure EHPad BB are not chosen amongst successors to form chains, and are selected as last resort when selecting the best candidate.

EHPad are scheduled in reverse probability order in order to have them flow into each others naturally.

Reviewers: chandlerc, majnemer, rafael, MatzeB, escha, silvas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265726 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 21:29:39 +00:00
Quentin Colombet
a8e98ebec4 [AArch64] Get rid of some GlobalISel ifdefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265725 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 21:24:40 +00:00
Quentin Colombet
4216f714b3 [AArch64] gcc does not like litteral without quotes even on preprocessor macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265720 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 20:49:15 +00:00
Quentin Colombet
4db7b50b8e [AArch64][CallLowering] Do not build the API if GlobalISel is not built.
This gets rid of some ifdefs and dummy implementations that were here
just to fill the blanks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265719 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 20:47:51 +00:00
Quentin Colombet
e8aba9ba83 [GlobalISel] Add RegBankSelect hooks into the pass pipeline.
Now, RegBankSelect will happen after the IRTranslation and the target
may optionally add additional passes in between.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265716 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 20:27:33 +00:00
Jan Vesely
62aa62a6e9 AMDGPU/SI: Implement atomic load/store for i32 and i64
Standard load/store instructions with GLC bit set.

Reviewers: tstellardAMD, arsenm

Differential Revision: http://reviews.llvm.org/D18760

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265709 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 19:23:11 +00:00
Tom Stellard
f313dae6f3 AMDGPU/SI: Add latency for export instructions
Reviewers: arsenm, nhaehnle

Subscribers: nhaehnle, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265708 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 18:30:05 +00:00
Quentin Colombet
13588d8354 [RegBankSelect] Initial implementation for non-optimized output.
The pass walk through the machine function and assign the register banks
using the default mapping. In other words, there is no attempt to reduce
cross register copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265707 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 18:19:27 +00:00
Quentin Colombet
f9b131188b [RegisterBankInfo] Provide a target independent helper function to guess
the mapping of an instruction on register bank.

For most instructions, it is possible to guess the mapping of the
instruciton by using the encoding constraints.
It remains instructions without encoding constraints.
For copy-like instructions, we try to propagate the information we get
from the other operands. Otherwise, the target has to give this
information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265703 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 18:01:19 +00:00
Quentin Colombet
83fadc56a6 [RegisterBankInfo] Change the signature of getSizeInBits to factor out
the access to MRI and TRI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265701 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 17:44:54 +00:00
Quentin Colombet
f77a6ecd34 [RegisterBankInfo] Provide a default constructor for InstructionMapping
helper class.

The default constructor creates invalid (isValid() == false) instances
and may be used to communicate that a mapping was not found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265699 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 17:30:18 +00:00
Quentin Colombet
b92870665f [MachineRegisterInfo] Track register bank for virtual registers.
A virtual register may have either a register bank or a register class.
This is represented by a PointerUnion between the related classes.

Typically, a virtual register went through the following states
regarding register class and register bank:

1. Creation: None is set. Virtual registers are fully generic.
2. Register bank assignment: Register bank is set. Virtual registers
live into a register bank, but we do not know the constraints they need
to fulfil.
3. Instruction selection: Register class is set. Virtual registers are
bound by encoding constraints.

To map these states to GlobalISel, the IRTranslator implements #1,
RegBankSelect #2, and Select #3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265696 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 17:20:29 +00:00
Quentin Colombet
8074e6007a [RegisterBank] Rename RegisterBank::contains into RegisterBank::covers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265695 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 17:09:39 +00:00
Ulrich Weigand
78886ec7e2 [SystemZ] Fix build break from r265689
Fix build error seen on some build bots due to:
error: default label in switch which covers all enumeration values



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265693 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 16:33:25 +00:00
Kevin B. Smith
d39343242f [X86]: Fix for PR27251.
Differential Revision: http://reviews.llvm.org/D18850


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265690 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 16:15:34 +00:00
Ulrich Weigand
05fbbee99e [SystemZ] Implement conditional returns
Return is now considered a predicable instruction, and is converted
to a newly-added CondReturn (which maps to BCR to %r14) instruction by
the if conversion pass.

Also, fused compare-and-branch transform knows about conditional
returns, emitting the proper fused instructions for them.

This transform triggers on a *lot* of tests, hence the huge diffstat.
The changes are mostly jX to br %r14 -> bXr %r14.

Author: koriakin

Differential Revision: http://reviews.llvm.org/D17339



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265689 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 16:11:44 +00:00
Davide Italiano
a2a5c796cb [IR/Verifier] Merge two ifs into one. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265688 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 15:55:28 +00:00
Ulrich Weigand
ff889a6bac [GVN] Address review comments for D18662
As suggested by Chandler in his review comments for D18662, this
follow-on patch renames some variables in GetLoadValueForLoad and
CoerceAvailableValueToLoadType to hopefully make it more obvious
which variables hold value sizes and which hold load/store sizes.

No functional change intended.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265687 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 15:55:11 +00:00
Ulrich Weigand
d04d5a974e [GVN] Fix handling of sub-byte types in big-endian mode
When GVN wants to re-interpret an already available value in a smaller
type, it needs to right-shift the value on big-endian systems to ensure
the correct bytes are accessed.  The shift value is the difference of
the sizes of the two types.

This is correct as long as both types occupy multiples of full bytes.
However, when one of them is a sub-byte type like i1, this no longer
holds true: we still need to shift, but only to access the correct
*byte*.  Accessing bits within the byte requires no shift in either
endianness; e.g. an i1 resides in the least-significant bit of its
containing byte on both big- and little-endian systems.

Therefore, the appropriate shift value to be used is the difference of
the *storage* sizes of the two types.  This is already handled correctly
in one place where such a shift takes place (GetStoreValueForLoad), but
is incorrect in two other places: GetLoadValueForLoad and
CoerceAvailableValueToLoadType.

This patch changes both places to use the storage size as well.

Differential Revision: http://reviews.llvm.org/D18662



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265684 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 15:45:02 +00:00
Ehsan Amiri
6ff814c730 [PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
http://reviews.llvm.org/D18562

A large number of testcases has been modified so they pass after this test.
One testcase is deleted, because I realized even after undoing the original
change that was committed with this testcase, the testcase still passes. So
I removed it. The change to one other testcase (test/CodeGen/PowerPC/pr25802.ll)
is an arbitrary change to keep it passing. Given the original intention of the
testcase, and the fact that fixing it will require some time to change the testcase,
we concluded that this quick change will be enough.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265683 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 15:30:55 +00:00
Tom Stellard
c2d9280e43 AMDGPU/SI: Add MachineBasicBlock parameter to SIInstrInfo::insertWaitStates
Summary: This makes it possible to insert nops at the end of blocks.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18549

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265678 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 14:47:07 +00:00
Valery Pykhtin
30c5dec16c [AMDGPU] fix readlane/readfirstlane src vgpr operand type.
For VGPR_32 operand disassembler expects a VGPR register encoded as 0..255 (enum8 src operand).
readfirstlane/readline actually has enum9 operand and this change fixes VGPR_32 to VS_32 (enum9 encoding).

Differential Revision: http://reviews.llvm.org/D18696

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265670 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 13:41:51 +00:00
Dmitry Polukhin
ba4922356c [GCC] Attribute ifunc support in llvm
This patch add support for GCC attribute((ifunc("resolver"))) for
targets that use ELF as object file format. In general ifunc is a
special kind of function alias with type @gnu_indirect_function. Patch
for Clang http://reviews.llvm.org/D15524

Differential Revision: http://reviews.llvm.org/D15525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265667 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 12:32:19 +00:00
NAKAMURA Takumi
719a4bd1ab InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265657 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 11:30:06 +00:00
Benjamin Kramer
47d60da931 Make helper functions static. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265653 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 10:10:09 +00:00
Simon Pilgrim
405e645cb1 [X86][SSE] Add support for VZEXT constant folding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265646 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 07:52:45 +00:00
Amaury Sechet
3b594eaf52 [BlockPlacement] Remove an unnecessary continue
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265643 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 06:35:00 +00:00