Commit Graph

124224 Commits

Author SHA1 Message Date
Davide Italiano
c25aec1117 [llvm-rtdyld] Message() is used only once. Inline. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 23:12:15 +00:00
Rong Xu
ba29cc35f8 Add some constantness to GetSuccessorNumber().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 23:02:06 +00:00
NAKAMURA Takumi
2bdcd86819 Move free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253730 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 22:55:34 +00:00
Eric Christopher
3b206a4729 Power8 and later support fusing addis/addi and addis/ld instruction
pairs that use the same register to execute as a single instruction.
No Functional Change

Patch by Kyle Butt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253724 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 22:38:20 +00:00
Owen Anderson
108258ac78 Fix another infinite loop in Reassociate caused by Constant::isZero().
Not all zero vectors are ConstantDataVector's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 22:34:48 +00:00
Geoff Berry
2d2aadfa70 [CodeGenPrepare] Create more extloads and fewer ands
Summary:
Add and instructions immediately after loads that only have their low
bits used, assuming that the (and (load x) c) will be matched as a
extload and the ands/truncs fed by the extload will be removed by isel.

Reviewers: mcrosier, qcolombet, ab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14584

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253722 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 22:34:39 +00:00
Chris Bieneman
d43d18c48b [CMake] Fix handling of passing through semi-colon separated lists.
When passing around CMake arguments as lists of arguments any arguments containing lists need to have their semi-colons escaped otherwise CMake will split the arguments in the middle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253719 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 22:08:49 +00:00
Arnaud A. de Grandmaison
8ba4bf96a9 [ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger.
The included test only checks for a compiler crash for now. Several people are
facing this issue, so we first resolve the crash, and will increase shrinkwrap's
coverage later in a follow-up patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253718 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 21:54:27 +00:00
Diego Novillo
15d2198650 SamplePGO - Tweak RUN command for a test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253717 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 21:46:41 +00:00
Diego Novillo
ddec40be2c SamplePGO - Do not count never-executed inlined functions when computing coverage.
If a function was originally inlined but not actually hot at runtime,
its samples will not be counted inside the parent function. This throws
off the coverage calculation because it expects to find more used
records than it should.

Fixed by ignoring functions that will not be inlined into the parent.
Currently, this is inlined functions with 0 samples.  In subsequent
patches, I'll change this to mean "cold" functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253716 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 21:46:38 +00:00
Jun Bum Lim
c8ef580c58 [AArch64]Merge narrow zero stores to a wider store
This change merges adjacent zero stores into a wider single store.
For example :
  strh wzr, [x0]
  strh wzr, [x0, #2]
becomes
  str wzr, [x0]

This will fix PR25410.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253711 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 21:14:07 +00:00
Eric Christopher
3de08c62a1 Weak non-function symbols were being accessed directly, which is
incorrect, as the chosen representative of the weak symbol may not live
with the code in question. Always indirect the access through the TOC
instead.

Patch by Kyle Butt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 20:51:31 +00:00
Krzysztof Parzyszek
177d040724 [Hexagon] Fix the return value from HexagonGenInsert::runOnMachineFunction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253705 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 20:46:23 +00:00
Bill Seurer
89c83dc08b Fix test case label check
Several (but not all) of the labels that are checked for in this test case
are checked as strings instead of labels.  This can cause an apparent test
case failure if they are tested in an appropriately named directory.

For example, one of them that fails:

define zeroext i32 @test2(i32 %A.u, i32 %B.u)  {
; A8: test2
; A8: uxtab  r0, r0, r1


Output that causes it to fail:

. . .
	.file	"/home/seurer/llvm/llvm-test2/test/CodeGen/Thumb2/thumb2-uxt_rot.ll"
. . .
	.globl	test2
	.align	1
	.type	test2,%function
	.code	16                      @ @test2
	.thumb_func
test2:
	.fnstart


The "A8: test2" matches on the directory name instead of the label.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253702 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 20:24:49 +00:00
Reid Kleckner
368c7cb1bd Fix the Windows build, include <tuple> for std::tie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253698 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 19:29:40 +00:00
Tilmann Scheller
73a482f4cc Revert "[FunctionAttrs] Remove redundant assignment."
This reverts r253661.

Turns out that the assignment is not redundant (despite the Clang static analyzer claiming the opposite).

The variable is being used by the lambda function AddUsersToWorklistIfCapturing().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253696 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 19:17:10 +00:00
Nathan Slingerland
e0a7f28fc6 [llvm-profdata] Add merge() to InstrProfRecord
Summary:
This change refactors two aspects of InstrProfRecord:

1) Add a merge() method to InstrProfRecord (previously InstrProfWriter combineInstrProfRecords()) in order to better encapsulate this functionality and to make the InstrProfRecord and SampleRecord APIs more consistent.

2) Make InstrProfRecord mergeValueProfData() a private method since it is only ever called internally by merge().

Reviewers: dnovillo, bogner, davidxl

Subscribers: silvas, vsk, llvm-commits

Differential Revision: http://reviews.llvm.org/D14786

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 19:12:43 +00:00
Artyom Skrobov
c9180bfb44 Avoid duplicate entry for cortex-a7 in the TargetParser (NFC)
Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D14757

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253676 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 16:46:14 +00:00
Artyom Skrobov
7cbf72b489 Handle ARMv6-J as an alias, instead of fake architecture
Summary:
This follows D14577 to treat ARMv6-J as an alias for ARMv6,
instead of an architecture in its own right.

The functional change is that the default CPU when targeting ARMv6-J
changes from arm1136j-s to arm1136jf-s, which is currently used as
the default CPU for ARMv6; both are, in fact, ARMv6-J CPUs.

The J-bit (Jazelle support) is irrelevant to LLVM, and it doesn't
affect code generation, attributes, optimizations, or anything else,
apart from selecting the default CPU.

Reviewers: rengolin, logan, compnerd

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14755

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253675 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 16:46:09 +00:00
Diego Novillo
c6b24c2806 SamplePGO - Add line offset and discriminator information to sample reports.
While debugging some sampling coverage problems, I found this useful:
When applying samples from a profile, it helps to also know what line
offset and discriminator the sample belongs to. This makes it easy to
correlate against the input profile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253670 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 15:39:42 +00:00
Teresa Johnson
086ed798ff [ThinLTO] Add MODULE_CODE_METADATA_VALUES record
Summary:
This is split out from the ThinLTO metadata mapping patch
http://reviews.llvm.org/D14752.

To avoid needing to parse the module level metadata during function
importing, a new module-level record is added which holds the
number of module-level metadata values. This is required because
metadata value ids are assigned implicitly during parsing, and the
function-level metadata ids start after the module-level metadata ids.

I made a change to this version of the code compared to D14752
in order to add more consistent and thorough assertion checking of the
new record value. We now unconditionally use the record value to
initialize the MDValueList size, and handle it the same in parseMetadata
for all module level metadata cases (lazy loading or not).

Reviewers: dexonsmith, joker.eph

Subscribers: davidxl, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D14825

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253668 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 14:51:27 +00:00
Tilmann Scheller
72bf3d33aa [Hexagon] Remove redundant assignment.
Identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253664 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 13:27:30 +00:00
Daniel Sanders
d498a1b6d1 Partially revert r253662: some unrelated work was accidentally committed with it.
Sorry.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253663 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 13:16:35 +00:00
Daniel Sanders
0bee4edf8c Revert the revert 253497 and 253539 - These commits aren't the cause of the clang-cmake-mips failures.
Sorry for the noise.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253662 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 13:13:53 +00:00
Tilmann Scheller
e4b48cdafb [FunctionAttrs] Remove redundant assignment.
Identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253661 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 12:51:58 +00:00
Tilmann Scheller
cf042f85d3 [Hexagon] Remove redundant local variable.
Identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253660 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 12:10:17 +00:00
Daniel Sanders
0a3cc8fdf5 Revert 253497 and 253539 to try to fix clang-cmake-mips buildbot.
It caused link errors of the form:
InstrProfiling.c:(.text.__llvm_profile_instrument_target+0x1c0): undefined reference to `__sync_fetch_and_add_8'

We had a network outage at the time of the commit so the first build to show a
problem is http://lab.llvm.org:8011/builders/clang-cmake-mips/builds/10827



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253656 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 10:07:11 +00:00
Owen Anderson
3f9c2909a5 Fix a pair of issues that caused an infinite loop in reassociate.
Terrifyingly, one of them is a mishandling of floating point vectors
in Constant::isZero().  How exactly this issue survived this long
is beyond me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253655 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 08:16:13 +00:00
Craig Topper
6be7f00207 Use range-based for loops. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253652 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 07:18:48 +00:00
Hrvoje Varga
63e0cbed94 [mips][microMIPS] Implement MUL[_S].PH, MULEQ_S.W.PHL, MULEQ_S.W.PHR, MULEU_S.PH.QBL, MULEU_S.PH.QBR, MULQ_RS.PH, MULQ_RS.W, MULQ_S.PH and MULQ_S.W instructions
Differential Revision: http://reviews.llvm.org/D14280


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 07:14:52 +00:00
Dan Gohman
697df03545 [WebAssembly] Remove the AsmPrinter code for printing physical registers.
WebAssembly does not have physical registers, so even if LLVM uses physical
registers like SP, they'll need to be lowered to virtual registers before
AsmPrinter time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253644 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 03:13:31 +00:00
Dan Gohman
4088342d21 [WebAssembly] Add a few open tasks to the target README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253643 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 03:08:27 +00:00
Dan Gohman
b2e21a25bd [WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253642 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 03:02:49 +00:00
Dan Gohman
a90cea254c [WebAssembly] Remove done items from the README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253640 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 02:51:38 +00:00
Dan Gohman
74a34413f8 [WebAssembly] Add asserts that the expression stack is used in stack order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 02:33:24 +00:00
Dan Gohman
8300bfce73 [WebAssemby] Enforce FIFO ordering for instructions using stackified registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 02:19:12 +00:00
Peter Collingbourne
5178bc957a ScalarEvolution: do not set nuw when creating exprs of form <expr> + <all-ones>.
The nuw constraint will not be satisfied unless <expr> == 0.

This bug has been around since r102234 (in 2010!), but was uncovered by
r251052, which introduced more aggressive optimization of nuw scev expressions.

Differential Revision: http://reviews.llvm.org/D14850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 01:26:13 +00:00
Eric Christopher
77072b3170 Split the argument unscheduling loop in the WebAssembly register
coloring pass. Turn the logic into "look for an insert point and
then move things past the insert point".

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253626 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 00:34:54 +00:00
Tobias Edler von Koch
cbf870d3b1 [LTO] Add options to llvm-lto to select output format and dump merged module
This introduces two new options:
- "llvm-lto -save-merged-module -o outfile" dumps the LTO Module to
  outfile.merged.bc prior to CodeGen and after LTO optimizations have been run.
- "llvm-lto -filetype=asm -o outfile" makes llvm-lto emit assembly instead of
  object code in outfile.

Both are intended for use in lit tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253624 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 00:13:05 +00:00
Tobias Edler von Koch
5b01c01496 [LTO] Add option to emit assembly from LTOCodeGenerator
This adds a new API, LTOCodeGenerator::setFileType, to choose the output file
format for LTO CodeGen. A corresponding change to use this new API from
llvm-lto and a test case is coming in a separate commit.

Differential Revision: http://reviews.llvm.org/D14554



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253622 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 23:59:24 +00:00
Eric Christopher
a0734793bf Fix a [-Werror,-Wcovered-switch-default] warning by removing the
unnecessary default case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253621 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 23:45:42 +00:00
Reid Kleckner
d1d6f53a8b [WinEH] Disable most forms of demotion
Now that the register allocator knows about the barriers on funclet
entry and exit, testing has shown that this is unnecessary.

We still demote PHIs on unsplittable blocks due to the differences
between the IR CFG and the Machine CFG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253619 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 23:23:33 +00:00
Dan Gohman
0426ad40b5 [WebAssembly] Implement isCheapToSpeculateCtlz and isCheapToSpeculateCttz.
This unbreaks test/CodeGen/WebAssembly/i32.ll and
test/CodeGen/WebAssembly/i64.ll after r224899.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253617 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 23:04:59 +00:00
Arch D. Robison
ab9499328c Cleanup some -Wundef warnings in include/llvm/Support/MathExtras.h
Fix avoids gratuitous warnings from gcc for "_MSC_VER" not being defined.

Differential Revision: http://reviews.llvm.org/D14598

Patch by Tony Kelman <tony@kelman.net>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253614 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 22:37:26 +00:00
Diego Novillo
8003b38f27 SamplePGO - Tweak debugging output for function samples. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253612 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 22:18:30 +00:00
Simon Pilgrim
3f1dbfd35d [X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index.
Found during stress testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 22:13:56 +00:00
Sanjay Patel
272898a425 [InstCombine] add tests to show missing trunc optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 22:11:52 +00:00
Reid Kleckner
eaaa0ed96c Fix UMRs in Mips disassembler on invalid instruction streams
The Insn and Size local variables were used without initialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253607 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 21:51:55 +00:00
Simon Pilgrim
aebdd5bcdf [X86] Use existing MachineInstrBuilder::addDisp to create offseted pointer. NFC.
Minor code duplication tidyup to D13988

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253606 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 21:50:57 +00:00
Davide Italiano
38e5db618a Follow up to r253591. Turn into an assertion.
Reported by: David Blaikie.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253605 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 21:50:08 +00:00