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2855 Commits

Author SHA1 Message Date
Chris Lattner
c970f062e0 If LSR went through a lot of trouble to put constants (e.g. the addr of a global 
in a specific BB, don't undo this!).  This allows us to compile
CodeGen/X86/loop-hoist.ll into:

_foo:
        xorl %eax, %eax
***     movl L_Arr$non_lazy_ptr, %ecx
        movl 4(%esp), %edx
LBB1_1: #cond_true
        movl %eax, (%ecx,%eax,4)
        incl %eax
        cmpl %edx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

instead of:

_foo:
        xorl %eax, %eax
        movl 4(%esp), %ecx
LBB1_1: #cond_true
***     movl L_Arr$non_lazy_ptr, %edx
        movl %eax, (%edx,%eax,4)
        incl %eax
        cmpl %ecx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

This was noticed in 464.h264ref.  This doesn't usually affect PPC,
but strikes X86 all the time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 06:02:42 +00:00
Chris Lattner
79980b07da Compile X << 1 (where X is a long-long) to: 
addl %ecx, %ecx
        adcl %eax, %eax

instead of:

        movl %ecx, %edx
        addl %edx, %edx
        shrl $31, %ecx
        addl %eax, %eax
        orl %ecx, %eax

and to:

        addc r5, r5, r5
        adde r4, r4, r4

instead of:

        slwi r2,r9,1
        srwi r0,r11,31
        slwi r3,r11,1
        or r2,r0,r2

on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:50:39 +00:00
Evan Cheng
d6594ae54c Added support for machine specific constantpool values. These are useful for 
representing expressions that can only be resolved at link time, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:00:35 +00:00
Nate Begeman
019f851ab2 Behold, more work on relocations. Things are looking pretty good now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 23:03:44 +00:00
Chris Lattner
c66764c007 This code was trying too hard. By eliminating redundant edges in the CFG 
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.

This fixes 458.sjeng on x86 with llc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 06:36:57 +00:00
Chris Lattner
6ddf8ed6fe Implement the fpowi now by lowering to a libcall 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:03:30 +00:00
Chris Lattner
f3f333dbd6 Allow targets to custom lower expanded BIT_CONVERT's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30217 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 00:20:27 +00:00
Nate Begeman
94be248dbb First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 22:42:09 +00:00
Chris Lattner
0c5b8dac79 Non-allocatable physregs can be killed and dead, but don't treat them as 
safe for later allocation.  This fixes McCat/18-imp with llc-beta.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30204 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 20:21:31 +00:00
Chris Lattner
cc406328bf This fixes Benchmarks/Prolangs-C/unix-smail 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30198 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 19:11:11 +00:00
Chris Lattner
45d5788123 Fix a bunch of llc-beta failures on x86 yesterday. Don't allow selection 
of unallocatable registers, just because an alias is allocatable.  We were
picking registers like SIL just because ESI was being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30197 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 19:03:30 +00:00
Jim Laskey
a0f3d17daa Make target asm info a property of the target machine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:06:40 +00:00
Evan Cheng
61c958e691 Fix pasto that was breaking x86 tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30151 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 18:50:20 +00:00
Chris Lattner
d5e93c0795 Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted 
too many phi operands when lowering a switch to branches in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30142 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 01:59:34 +00:00
Jim Laskey
563321a258 Separate target specific asm properties from the asm printers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:34:40 +00:00
Evan Cheng
5d8062bcee Only call isUse/isDef on register operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30122 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:32:06 +00:00
Chris Lattner
d8f44e07b8 Only call isUse/isDef on register operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:19:27 +00:00
Chris Lattner
67942f5dc3 Don't call isDef on non-registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:02:51 +00:00
Chris Lattner
7acf5f39fe Change the default to 0, which means 'default'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30114 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 17:39:15 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:12:02 +00:00
Chris Lattner
dffb2e83ed Correct fix for a crasher on functions with live in values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 18:27:40 +00:00
Chris Lattner
5277e4304e Hack around a regression I introduced yesterday 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30098 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 18:20:15 +00:00
Duraid Madina
0c9e0ff249 forgot this 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 07:44:11 +00:00
Duraid Madina
2a0013f59f add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 06:21:35 +00:00
Chris Lattner
47877050e7 new file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30082 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:16:09 +00:00
Chris Lattner
6b128bdc58 Avoid beating on the mi2i map when we know the answer already. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30066 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 08:07:11 +00:00
Chris Lattner
fbecc5a593 minor speedup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30065 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 07:53:50 +00:00
Chris Lattner
5e50349070 Fix Regression/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll on X86. 
Just because an alias of a register is available, it doesn't mean that we
can arbitrarily evict the register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30064 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 07:15:37 +00:00
Chris Lattner
2ac0d43fa2 When deleting a machine instruction, make sure to remove it from the 
livevariables information.  This fixes several regalloc=local failures on x86


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30062 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 00:06:08 +00:00
Chris Lattner
7a3abdc63c Move two methods out of line, make them work when the record for a machine 
instruction includes physregs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30061 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 00:05:09 +00:00
Chris Lattner
94425996c5 improve compat with certain versions of GCC (on cygwin?) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30054 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 17:37:30 +00:00
Chris Lattner
1acb17cb83 Iteration is required for some cases, even if they don't occur in crafty. 
Restore it, which re-fixes X86/2006-08-21-ExtraMovInst.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30050 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 05:32:53 +00:00
Chris Lattner
f21f0205b5 When joining two intervals where the RHS is really simple, use a light-weight 
method for joining the live ranges instead of the fully-general one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30049 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 05:26:59 +00:00
Evan Cheng
3f4fd0fd64 Allow legalizer to expand ISD::MUL using only MULHS in the rare case that is 
possible and the target only supports MULHS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 18:17:58 +00:00
Jim Laskey
3ebe71db6b Corrections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30021 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 12:55:05 +00:00
Chris Lattner
8a67f6e848 Pull some code out of a hot recursive function because the common case doesn't 
need recursion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30015 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 07:00:23 +00:00
Chris Lattner
238416c99b Reserve space in the ValueNumberInfo vector. This speeds up live interval 
analysis 16% on crafty.

Wrap long lines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30012 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 06:10:18 +00:00
Chris Lattner
a2a8f0919d Iterative coallescing doesn't buy us anything (we get identical results on 
crafty with and without it).  Removing it speeds up live intervals 6%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30010 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 04:02:42 +00:00
Evan Cheng
dfcfacb0cb DAG combiner fix for rotates. Previously the outer-most condition checks 
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 07:41:12 +00:00
Chris Lattner
2ebfa0c618 Add a special case that speeds up coallescing a bit, but not enough. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29996 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 06:48:26 +00:00
Chris Lattner
bfe180af9e Delete copies as they are coallesced instead of waiting until the end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29995 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 05:58:59 +00:00
Chris Lattner
91725b7585 avoid calling the virtual isMoveInstr method endlessly by caching its results. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 05:54:43 +00:00
Chris Lattner
ba256037ce Fix a compiler crash bootstrapping llvm-gcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-30 23:02:29 +00:00
Chris Lattner
6d8fbef015 Teach the coallescer to coallesce live intervals joined by an arbitrary 
number of copies, potentially defining live ranges that appear to have
differing value numbers that become identical when coallsced.  Among other
things, this fixes CodeGen/X86/shift-coalesce.ll and PR687.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29968 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 23:18:15 +00:00
Jim Laskey
ce50a165c7 Handle callee saved registers in dwarf frame info (lead up to exception 
handling.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 16:24:26 +00:00
Evan Cheng
1efba0ecb4 Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29951 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 06:42:35 +00:00
Chris Lattner
7f8897f22e eliminate RegisterOpt. It does the same thing as RegisterPass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29925 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 22:42:52 +00:00
Chris Lattner
5d8925c7c5 Eliminate RegisterAnalysis. RegisterPass now does all that is necessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29921 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 22:30:17 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00