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Author SHA1 Message Date
Chris Lattner
73459d097b add a new prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21305 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-15 19:24:49 +00:00
Chris Lattner
ec656f57f4 new testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21304 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-15 19:24:36 +00:00
Andrew Lenharth
1e0d9bda62 fix calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21303 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 17:34:20 +00:00
Andrew Lenharth
3ae1829fe5 a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21302 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 16:24:00 +00:00
Andrew Lenharth
80563ff1a5 added a random and mask test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21301 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 16:17:49 +00:00
Duraid Madina
1ce0c015ad print negative 64 bit immediates as negative numbers, makes things a little 
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21300 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 10:08:01 +00:00
Duraid Madina
3eb7150c3e oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21299 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 10:06:35 +00:00
Nate Begeman
7bfba7d5e3 Implement multi-way branches through logical ops on condition registers. 
This can generate considerably shorter code, reducing the size of crafty
by almost 1%.  Also fix the printing of mcrf.  The code is currently
disabled until it gets a bit more testing, but should work as-is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21298 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 09:45:08 +00:00
Nate Begeman
72ea281d61 Add a couple missing transforms in getSetCC that were triggering assertions 
in the PPC Pattern ISel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21297 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 08:56:52 +00:00
Duraid Madina
c4ccc2db6b we have zextloads, not sextloads! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21296 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 08:37:32 +00:00
Nate Begeman
ef7288c824 Add the necessary support to codegen condition register logical ops with 
register allocated condition registers.  Make sure that the printed
  output is gas compatible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21295 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 03:20:38 +00:00
Nate Begeman
1b7f7fbf95 Start allocating condition registers. Almost all explicit uses of CR0 are 
now gone.  Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21294 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 23:15:44 +00:00
Nate Begeman
3664ceffdd Implement the fold shift X, zext(Y) -> shift X, Y at the target level, 
where it is safe to do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21293 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 22:14:14 +00:00
Nate Begeman
77a6d9032f Add CodeGen tests for the recent SelectionDAG transforms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21292 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 21:45:13 +00:00
Nate Begeman
eea805e74c Disbale the broken fold of shift + sz[ext] for now 
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
  always produces zero or one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 21:23:31 +00:00
Chris Lattner
97e001dec7 fix an infinite loop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21289 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 20:06:29 +00:00
Chris Lattner
fd8d389ede fix some serious miscompiles on ia64, alpha, and ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21288 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 19:53:40 +00:00
Chris Lattner
51679c430f avoid work when possible, perhaps fix the problem nate and andrew are seeing 
with != 0 comparisons vanishing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21287 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 19:41:05 +00:00
Andrew Lenharth
c24b537399 WOW, function calls still seem to work after this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21286 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 17:17:28 +00:00
Andrew Lenharth
556c44e116 prepare for func call optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21285 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 16:19:50 +00:00
Andrew Lenharth
eecbf30e9c regression case for faster call sequence 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21284 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 16:16:01 +00:00
Andrew Lenharth
f701697101 check that casts still use zap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21283 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 13:00:16 +00:00
Duraid Madina
ed09502a0b * add the shladd instruction 
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21282 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 06:12:04 +00:00
Andrew Lenharth
4f7cba5af8 add matches for SxADDL and company, as well as simplify the SxADDQ code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21281 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 05:19:55 +00:00
Chris Lattner
e9c35e7309 Implement expansion of unsigned i64 -> FP. 
Note that this probably only works for little endian targets, but is enough
to get siod working :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21280 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 05:09:42 +00:00
Duraid Madina
c02780eed1 * if ANDing with a constant of the form: 
0x00000..00FFF..FF
      ^      ^
      ^      ^
    any number of
    0's followed by
    some number of
    1's

    then we use dep.z to just paste zeros over the input. For the special
    cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
    because we're all about readability!!!
    that's what it's about!! readability!

  *twitch* ;D


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21279 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 04:50:54 +00:00
Andrew Lenharth
003e68e442 added s4addl matching test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21277 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 04:41:06 +00:00
Andrew Lenharth
483f22d817 added all flavors of zap for anding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21276 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 03:47:03 +00:00
Chris Lattner
ffe284c651 Make expansion of uint->fp cast assert out instead of infinitely recurse. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21275 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 03:42:14 +00:00
Chris Lattner
5bf2686a1b Fix some mysteriously missing {}'s which cause the miscompilation of 
Olden/mst, Ptrdist/bc, Obsequi, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21274 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 03:29:53 +00:00
Chris Lattner
e666fcfbdd add back the optimization that Nate added for shl X, (zext_inreg y) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21273 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:58:13 +00:00
Chris Lattner
8a8dbfa57c Oops, remove these too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21272 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:47:57 +00:00
Chris Lattner
519f40ba4e remove one more occurance of this that snuck in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21271 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:46:17 +00:00
Chris Lattner
2942e9c301 Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff 
like this:

        ldah $1,1($31)
        lda $1,-1($1)
        and $0,$1,$24

instead of this:

        zap $0,252,$24

To get this back, the selector should recognize the ISD::AND case where this
happens and emit the appropriate ZAP instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21270 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:43:40 +00:00
Chris Lattner
6ac614a4f2 Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing 
things like this:

       mov r9 = 65535;;
       and r8 = r8, r9;;

To be emitted instead of:

        zxt2 r8 = r8;;

To get this back, the selector for ISD::AND should recognize this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21269 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:41:52 +00:00
Chris Lattner
c951d87fe9 Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit 
andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21268 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:40:26 +00:00
Chris Lattner
91302a10ae Z_E_I is gone 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21267 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:39:05 +00:00
Chris Lattner
23993561e2 Instead of making ZERO_EXTEND_INREG nodes, use the helper method in 
SelectionDAG to do the job with AND.  Don't legalize Z_E_I anymore as
it is gone


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21266 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:38:47 +00:00
Chris Lattner
0f2287baa1 Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes 
instead.  OVerall, this increases the amount of folding we can do.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21265 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:38:18 +00:00
Chris Lattner
1ccae666f5 Add a new helper method which returns the and that is equivalent to what 
ZERO_EXTEND_INREG was.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21264 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:37:19 +00:00
Chris Lattner
ea57610689 Remove the ZERO_EXTEND_INREG node which is redundant with AND 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21263 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:36:41 +00:00
Nate Begeman
db81ebab89 Fold shift x, [sz]ext(y) -> shift x, y 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21262 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 23:32:28 +00:00
Nate Begeman
b882752bd0 Fold shift by size larger than type size to undef 
Make llvm undef values generate ISD::UNDEF nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 23:12:17 +00:00
Nate Begeman
9765c25eb7 Implement setcc op, -1 sequences 
Remove dead setcc op, 0 sequences
Coming later: generalization of op, imm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21260 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 21:22:28 +00:00
Chris Lattner
1c51c6ac13 promote extload i1 -> extload i8 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21258 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 20:30:10 +00:00
Chris Lattner
3464547968 add an argument to allow avoiding deleting phi nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21255 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 18:52:14 +00:00
Chris Lattner
0b2fc9b560 add an argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21254 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 18:51:53 +00:00
Chris Lattner
151c80be81 Get rid of this for_each loop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21253 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 18:51:33 +00:00
Duraid Madina
e8fd25f5c5 * OK, after changing to use liveIn/liveOut instead of IDEFs, 
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.

FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:

out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127

and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21252 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 18:42:59 +00:00
Andrew Lenharth
0b04b5d562 Get rid of idefs for arguments (oops) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21251 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 17:47:57 +00:00