Chris Lattner
93689114a5
Remove think-o assertion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4917 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:18:30 +00:00
Chris Lattner
d6c4cfab54
Avoid crashing on Arguments, just silently miscompile
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4916 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:15:34 +00:00
Misha Brukman
a361c8417b
storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value
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instead of by reference, since they return the modified iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4914 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:14:13 +00:00
Misha Brukman
0af0d5bd3e
Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since
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it is target-independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4911 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 16:47:04 +00:00
Chris Lattner
504c411e81
Add a "Lazy Function Resolution in Jello" section
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Remove some todo's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4910 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 16:12:54 +00:00
Chris Lattner
33ced56edb
Fix a bug I introduced in a previous change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4909 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 06:56:56 +00:00
Chris Lattner
dbf30f7b02
Add support for referencing global variables/functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4907 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 06:45:19 +00:00
Misha Brukman
03c6fafd05
Added support for callee- and caller-save registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4897 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 23:11:21 +00:00
Chris Lattner
e8e6743cb7
Fix broken ret opcode, grr...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4895 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 22:50:02 +00:00
Chris Lattner
d852c15546
Fix instsel for calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4891 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 20:30:12 +00:00
Chris Lattner
f18a36e398
Fix the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4884 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 18:15:59 +00:00
Brian Gaeke
07f02614f6
brg
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Add support for cast ... to bool in visitCastInst (it's a start, anyways...)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4883 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 07:36:03 +00:00
Chris Lattner
ea1ddab58e
Split the machine code emitter completely out of the printer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4882 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 06:34:06 +00:00
Chris Lattner
4ce42a776a
* Move information about Implicit Defs/Uses into X86InstrInfo.def.
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* Expose information about implicit defs/uses of register through the
MachineInstrInfo.h file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4877 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 05:42:53 +00:00
Brian Gaeke
bb25f2f08d
brg
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X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4874 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 00:51:09 +00:00
Chris Lattner
8f04b0981f
More support for machine code emission: raw instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4872 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:56:18 +00:00
Chris Lattner
b0f99b90df
Expose explicit type
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4871 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:50:41 +00:00
Chris Lattner
76041ce515
Start implementing MachineCodeEmitter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4870 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:44:34 +00:00
Chris Lattner
4aff92860d
Eliminate OtherFrm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4868 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:40:58 +00:00
Chris Lattner
a5855c829b
Remove comment
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Remove handling of OtherFrm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4867 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:40:46 +00:00
Chris Lattner
40ead95928
Initial support for machine code emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4866 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:24:12 +00:00
Misha Brukman
6877dd3fb0
Fix order of operands on a store from reg to [reg+offset].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4857 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:10:35 +00:00
Chris Lattner
f8bafe8fdb
Add rawfrm flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4841 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-01 23:25:59 +00:00
Chris Lattner
a4978ccbcb
Don't add implicit regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4840 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-01 23:24:58 +00:00
Brian Gaeke
c2505985ce
brg
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InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
from visitReturnInst() to new method, promote32().
Use it in both visitReturnInst() and visitCallInst().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4839 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-30 11:57:28 +00:00
Brian Gaeke
18a20212d9
brg
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InstSelectSimple.cpp: First draft of visitCallInst method, handling
int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
PUSH with 32-bit reg arg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4838 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-29 12:01:58 +00:00
Brian Gaeke
c11232a8c4
brg
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InstSelectSimple.cpp: Add some comments that say what I'm going to do for
calls and casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4832 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-26 10:43:30 +00:00
Misha Brukman
8b938664f2
Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
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instructions correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4830 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 23:15:27 +00:00
Misha Brukman
f88a2853c8
Enable the register allocator pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:45:07 +00:00
Misha Brukman
cf2b9ac204
Added methods to read/write values to stack in .h, fixed implementation in
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.cpp to return the iterator correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4827 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:43:47 +00:00
Misha Brukman
a85d6bc2bc
Added -*- C++ -*- mode to the comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4826 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:42:50 +00:00
Misha Brukman
faf0b8c401
Add a simple way to add memory locations of format [reg+offset]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4825 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:42:12 +00:00
Brian Gaeke
fa8d571bd4
lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4821 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 11:07:01 +00:00
Chris Lattner
1d53ce4067
Handle cmp Reg, 0 correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4819 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 23:30:00 +00:00
Chris Lattner
7ef33a9076
Printing support for more stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4818 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:49:46 +00:00
Chris Lattner
3a9a693987
Don't add implicit operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4817 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:49:20 +00:00
Chris Lattner
128a7a96f0
Fix off by one bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4816 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:48:15 +00:00
Chris Lattner
15207f45db
Add fixme
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4815 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:48:01 +00:00
Chris Lattner
47b4a9b2e0
Minor code cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4814 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:04:50 +00:00
Chris Lattner
1804233ca5
Implement printing of store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4813 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:03:39 +00:00
Chris Lattner
3d3067bf6b
The big change here is to handle printing/emission of X86II::MRMSrcMem
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instructions. Right now the only users are load instructions, and Misha's
spill code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4812 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 20:44:15 +00:00
Chris Lattner
92845e37f5
Remove implicit information from instruction selector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4811 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 18:54:29 +00:00
Chris Lattner
457adb55f9
Add printing information for MUL and DIV
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4810 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 18:54:14 +00:00
Chris Lattner
94e8ee2282
Fix a bug that prevented compilation of multiple functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4809 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:26:58 +00:00
Chris Lattner
d3e0faca06
Remove opcode information for instructions that are completely defined now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4805 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:12:55 +00:00
Chris Lattner
644e3261d1
Add printing support for sahf & setcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4804 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:10:57 +00:00
Chris Lattner
675dd2cc47
Add printing support for /0 /1 type instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4803 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:09:01 +00:00
Chris Lattner
85b39f229f
Add support for /0 /1, etc type instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4802 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:08:49 +00:00
Chris Lattner
4b4e9dd937
Rename the SetCC X86 instructions to reflect the fact that they are the
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register versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4800 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 16:19:42 +00:00
Chris Lattner
05093a51b4
Simplify setcc code a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4799 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 15:52:38 +00:00
Chris Lattner
77875d88d0
Support Registers of the form (B8+ rd) for example
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4798 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 02:00:20 +00:00
Chris Lattner
97ad9e1fea
Dont' set flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4797 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:59:50 +00:00
Chris Lattner
233ad71051
Implement printing more, implement opcode output more
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4796 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:33:44 +00:00
Chris Lattner
0dc20dda5b
Huge diff do to reindeinting comments.
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Basically just adds OpSize flags for instructions that need them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4795 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:33:28 +00:00
Chris Lattner
11e53e3c38
Add new prefix flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4794 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:32:55 +00:00
Chris Lattner
644e1abae4
Print another class of instructions correctly, giving us: xorl EDX, EDX
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for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4793 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 00:30:01 +00:00
Misha Brukman
7c58925050
Booleans are types too. And they get stored in bytes. And InstructionSelection
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doesn't assert fail. And everyone's happy. Yay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4792 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 00:25:56 +00:00
Misha Brukman
b83b28697c
Add definitions for function headers from MRegisterInfo.h:
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Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4784 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 18:59:43 +00:00
Misha Brukman
e1f0d8113a
Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
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printing out assembly. After all, we want the real thing too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4783 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 18:56:41 +00:00
Misha Brukman
d2cc017f46
Add mapping in MachineFunction from SSA regs to Register Classes. Also,
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uncovered a bug where registers were not being put in a map if they were not
found...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4776 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:58:23 +00:00
Misha Brukman
90ed18c201
Sigh. Fixed some speling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4775 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:56:42 +00:00
Misha Brukman
602b9ff595
Thanks to the R8, R16, and R32 macros, I can now deal with registers that
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belong to different register classes easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4773 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:47:40 +00:00
Brian Gaeke
c03a0cb01b
Brian Gaeke says:
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lib/Target/X86/InstSelectSimple.cpp: Add a little something to
visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4755 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-19 09:08:47 +00:00
Chris Lattner
f9f6088e17
Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4743 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 06:56:51 +00:00
Chris Lattner
f21dfcddcf
Expose base opcode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4742 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 06:56:24 +00:00
Chris Lattner
6aab9cf65c
Start to add more information to instr.def
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 05:37:11 +00:00
Chris Lattner
239dcfd215
Add instruction annotation about whether it has a 0x0F opcode prefix
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4740 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:59:28 +00:00
Chris Lattner
9213b73c19
Add more void flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4739 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:37:48 +00:00
Chris Lattner
92bd0f9c4d
Set the void flag on instructions that should get it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4738 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:34:36 +00:00
Chris Lattner
927dd095c4
Arrange to have a TargetMachine available in X86InstrInfo::print
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4734 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:20:37 +00:00
Chris Lattner
e9b309ad13
Wow, I'm incapable of the simplest things today...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4732 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:05:21 +00:00
Chris Lattner
fb02a8b11f
Rename registers to follow the intel style of all caps
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4731 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:03:46 +00:00
Chris Lattner
dbb61c6445
Reorganize printing interface a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 22:53:13 +00:00
Chris Lattner
71e83caecd
Fix minor detail
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4725 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 22:33:26 +00:00
Chris Lattner
0692536b71
Fix Mul/Div clobbers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4718 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 21:56:38 +00:00
Chris Lattner
6fc3c52359
Fix a few typos, implement load/store
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4716 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 21:11:55 +00:00
Chris Lattner
9562add237
Add functions to buld X86 specific constructs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4714 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 21:03:35 +00:00
Chris Lattner
1411ba31ba
Add information about memory index representation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4712 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 20:33:26 +00:00
Chris Lattner
e7236ffa94
Add load/store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4711 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 20:33:12 +00:00
Chris Lattner
43189d17c3
Switch visitRet to use getClass()
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4710 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 20:07:45 +00:00
Brian Gaeke
6559bb96a9
include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline
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convenience method. Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
Take out LEAVE instructions.
32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
Add some simple code to Printer::runOnFunction to iterate over
MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
implicit defs "Void". Add more sign/zero extending "move" insns
(movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4707 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-14 22:32:30 +00:00
Brian Gaeke
20abb6bf45
InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return
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values.
X86InstrInfo.def: add LEAVE instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4691 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-11 19:37:09 +00:00
Brian Gaeke
1749d6359b
Add instruction selection code and tests for setcc instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4603 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-07 17:59:21 +00:00
Chris Lattner
f01729ea56
Implement signed and unsigned division and remainder
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4508 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:54:46 +00:00
Chris Lattner
ca9671d864
Implement multiply operator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4506 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:28:58 +00:00
Chris Lattner
68aad93291
* Implement subtract
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* Merge add code into logical code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4503 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:13:22 +00:00
Chris Lattner
e2954c84e9
shuffle code around a bit, implement and, or, xor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4502 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:04:26 +00:00
Chris Lattner
51b49a9633
Add PHI node support, add comment for branch function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4500 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 19:45:49 +00:00
Chris Lattner
2df035bb3c
Implement unconditional branching support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4498 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 19:27:56 +00:00
Chris Lattner
e9913f2cff
* Fix nonconstant shift case
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* Turn table into 2d table
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4496 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 01:41:55 +00:00
Chris Lattner
b1761fc4df
Use a more table driven approach to handling types. Seems to simplify the
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code a bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4493 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 01:15:18 +00:00
Chris Lattner
d5a87f80b7
Make switch statements denser, but only because of the follow-on patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4492 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 00:49:56 +00:00
Chris Lattner
796df73e6e
* Remove dead variable
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* Shift amount is always guaranteed to be 8 bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4491 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 00:44:25 +00:00
Brian Gaeke
a1719c9130
InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst.
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Add ISel::visitShiftInst() to instruction select shift instructions.
Add a comment in visitAdd about how to do 64 bit adds.
X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4477 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-31 23:03:59 +00:00
Chris Lattner
cc0b0c59e8
Add lots more info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4450 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 06:04:46 +00:00
Chris Lattner
8548ee75eb
Make sure to set the destination register correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4444 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 01:49:01 +00:00
Chris Lattner
b752e9a2ae
Set the destination register field based on the target specific flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4442 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 01:15:31 +00:00
Chris Lattner
9d17740295
Add flag to specify when no value is produced by an instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4441 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 01:09:34 +00:00
Chris Lattner
e5f5221b5e
Implement the new optional getRegisterInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4437 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 00:56:18 +00:00
Chris Lattner
3dffa7953f
Print machine code after instruction selection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4434 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 00:47:49 +00:00