121224 Commits

Author SHA1 Message Date
Dan Gohman
b7e01a085a [WebAssembly] DYNAMIC_STACKALLOC returns a pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245893 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 22:31:52 +00:00
Peter Collingbourne
8c1602df50 LTO: Simplify merged module ownership.
This change moves LTOCodeGenerator's ownership of the merged module to a
field of type std::unique_ptr<Module>. This helps simplify parts of the code
and clears the way for the module to be consumed by LLVM CodeGen (see D12132
review comments).

Differential Revision: http://reviews.llvm.org/D12205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 22:22:53 +00:00
JF Bastien
3a9c43563b WebAssembly: Implement call
Summary: Support function calls.

Reviewers: sunfish, sunfishcode

Subscribers: sunfishcode, jfb, llvm-commits

Differential revision: http://reviews.llvm.org/D12219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245887 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 22:16:48 +00:00
JF Bastien
9f728dbfdc Revert two bad commits.
Summary: I forgot to squash git commits before doing an svn dcommit of D12219. Reverting, and re-submitting.

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D12298

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245886 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 22:07:33 +00:00
JF Bastien
b7a8e4c591 Missing print.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 22:00:04 +00:00
JF Bastien
03685a9bf4 call
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245882 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 21:59:51 +00:00
Simon Pilgrim
e6f4f28248 [X86][SSE] Added tests for zero-extension vector shuffles that don't extend starting from the 0'th lane.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245878 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 21:28:13 +00:00
Dan Gohman
99f0983900 [WebAssembly] Make the assembly printer indent instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245875 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 21:19:48 +00:00
Peter Collingbourne
43a77da0e6 LTO: Rename mergedModule variables to MergedModule to prepare for ownership change.
Also convert a few loops to range-for loops and correct a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245874 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 21:15:35 +00:00
Rafael Espindola
850ecaba66 Report an error if a SHT_SYMTAB_SHNDX section has the wrong size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245873 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 21:09:41 +00:00
Dan Gohman
8ccfc118c6 [WebAssembly] CodeGen support for __builtin_wasm_page_size()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245872 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 21:03:24 +00:00
Sanjay Patel
a1da6bba1e fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245869 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 20:11:14 +00:00
Bill Schmidt
8c932ac614 [PPC64LE] Fix PR24546 - Swap optimization and debug values
This patch fixes PR24546, which demonstrates a segfault during the VSX
swap removal pass.  The problem is that debug value instructions were
not excluded from the list of instructions to be analyzed for webs of
related computation.  I've added the test case from the PR as a crash
test in test/CodeGen/PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245862 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 19:27:27 +00:00
Dan Gohman
3c334d631e [WebAssembly] Skeleton FastISel support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245860 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 18:44:37 +00:00
Dan Gohman
0ff46edca1 [WebAssembly] Implement floating point rounding operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245859 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 18:23:13 +00:00
Philip Reames
506ace9d6f [docs][PerformanceTips] Framing the generic IR tips
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245858 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 18:16:02 +00:00
Philip Reames
ac704fe134 [docs][PerformanceTips] Point people towards llvm-dev
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245856 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 17:46:11 +00:00
Philip Reames
047904e858 [docs] Further organization of the Performance Tips document
Arranging the language specific property section into readable groupings and adding a couple of notes about pass order, extensions, and the like.

For the record, suggestion for word smithing are welcomed.  I'm happy to revise; I'm just trying to get *something* in place.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 17:38:58 +00:00
Philip Reames
1cc793439f [docs] Organize the 'Performance Tips' page
This change just groups the suggestions by broad topic.  I'm planning a couple of follow on changes to improve the readability of this document.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 17:19:18 +00:00
Dan Gohman
18595a0862 [WebAssembly] Tell TargetTransformInfo about popcnt and sqrt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245853 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 16:51:46 +00:00
Dan Gohman
c723870037 [WebAssembly] Use the checked form of MachineFunction::getSubtarget. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245852 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 16:46:31 +00:00
Dan Gohman
c26771d7ab [WebAssembly] Implement the is_zero_undef forms of cttz and ctlz
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 16:39:37 +00:00
Adhemerval Zanella
9708c4754d [sanitizers] Add DFSan support for AArch64 42-bit VMA
This patch adds support for dfsan on aarch64-linux with 42-bit VMA
(current default config for 64K pagesize kernels).  The support is
enabled by defining the SANITIZER_AARCH64_VMA to 42 at build time
for both clang/llvm and compiler-rt.  The default VMA is 39 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245840 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 13:48:10 +00:00
Michael Zuckerman
59dfeede45 [X86] Add support for mmword memory operand size for Intel-syntax x86 assembly
Differential Revision: http://reviews.llvm.org/D12151


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 10:26:54 +00:00
Oliver Stannard
67a54d2081 Add DAG optimisation for FP16_TO_FP
The FP16_TO_FP node only uses the bottom 16 bits of its input, so the
following pattern can be optimised by removing the AND:

  (FP16_TO_FP (AND op, 0xffff)) -> (FP16_TO_FP op)

This is a common pattern for ARM targets when functions have __fp16
arguments, as they are passed as floats (so that they get passed in the
correct registers), but then bitcast and truncated to ignore the top 16
bits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245832 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 09:47:45 +00:00
Scott Douglass
3ad50284cb [ARM] Use AEABI helpers for i64 div and rem
Differential Revision: http://reviews.llvm.org/D12232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245830 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 09:17:18 +00:00
Scott Douglass
9b11d5f703 [ARM] Refactor LowerDivRem before adding LowerREM (nfc)
Differential Revision: http://reviews.llvm.org/D12230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245829 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 09:17:11 +00:00
Michael Zuckerman
7b854fda4a first commit to llvm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 07:48:50 +00:00
Mehdi Amini
59537e6802 Require Dominator Tree For SROA, improve compile-time
TL-DR: SROA is followed by EarlyCSE which requires the DominatorTree.
There is no reason not to require it up-front for SROA.

Some history is necessary to understand why we ended-up here.

r123437 switched the second (Legacy)SROA in the optimizer pipeline to
use SSAUpdater in order to avoid recomputing the costly
DominanceFrontier. The purpose was to speed-up the compile-time.

Later r123609 removed the need for the DominanceFrontier in
(Legacy)SROA.

Right after, some cleanup was made in r123724 to remove any reference
to the DominanceFrontier. SROA existed in two flavors: SROA_SSAUp and
SROA_DT (the latter replacing SROA_DF).
The second argument of `createScalarReplAggregatesPass` was renamed
from `UseDomFrontier` to `UseDomTree`.
I believe this is were a mistake was made. The pipeline was not
updated and the call site was still:
    PM->add(createScalarReplAggregatesPass(-1, false));

At that time, SROA was immediately followed in the pipeline by
EarlyCSE which required alread the DominatorTree. Not requiring
the DominatorTree in SROA didn't save anything, but unfortunately
it was lost at this point.

When the new SROA Pass was introduced in r163965, I believe the goal
was to have an exact replacement of the existing SROA, this bug
slipped through.

You can see currently:

$ echo "" | clang -x c++  -O3 -c - -mllvm -debug-pass=Structure
...
...
      FunctionPass Manager
        SROA
        Dominator Tree Construction
        Early CSE

After this patch:

$ echo "" | clang -x c++  -O3 -c - -mllvm -debug-pass=Structure
...
...
      FunctionPass Manager
        Dominator Tree Construction
        SROA
        Early CSE

This improves the compile time from 88s to 23s for PR17855.
https://llvm.org/bugs/show_bug.cgi?id=17855

And from 113s to 12s for PR16756
https://llvm.org/bugs/show_bug.cgi?id=16756

Reviewers: chandlerc

Differential Revision: http://reviews.llvm.org/D12267

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245820 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 22:15:49 +00:00
Sanjay Patel
1730292302 remove FIXME; fixed by r245733
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245819 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 20:43:25 +00:00
David Majnemer
a354cd3ea5 [IR] Cleanup EH instructions a little bit
Just a cosmetic change, no functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245818 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 19:22:31 +00:00
Simon Pilgrim
7b7cb4251e [DAGCombiner] Fold CONCAT_VECTORS of bitcasted EXTRACT_SUBVECTOR
Minor generalization of D12125 - peek through any bitcast to the original vector that we're extracting from.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245814 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 15:22:14 +00:00
Davide Italiano
a99b964662 [llvm-readobj/ELF] Factor out common code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245813 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 14:06:40 +00:00
Frederic Riss
d2681e8812 [dwarfdump] Do not apply relocations in mach-o files if there is no LoadedObjectInfo.
Not only do we not need to do anything to read correct values from the
object files, but the current logic actually wrongly applies twice the
section base address when there is no LoadedObjectInfo passed to the
DWARFContext creation (as the added test shows).

Simply do not apply any relocations on the mach-o debug info if there is
no load offset to apply.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 04:44:21 +00:00
Frederic Riss
8f7e8462cd [dsymutil] Remove old ODR uniquing tests
These tests have been obsoleted by the refactored versions introduced
in the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 02:38:37 +00:00
Frederic Riss
b7e7dd4975 [dsymutil] Refactor ODR uniquing tests to be more readable.
This patch adds all the refactored tests in new files, the old
tests will be removed by a followup commit.

Thanks to D. Blaikie for all the feedback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 02:38:29 +00:00
Joseph Tremoulet
50cbfe2c19 [LangRef] Fix sphinx warning
Fix invalid inline literal introduced in r245797



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 01:04:12 +00:00
Mehdi Amini
221b8cc736 Add missing break in AArch64DAGToDAGISel::Select() switch case
Reported by coverity.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245800 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 00:42:57 +00:00
Mehdi Amini
939b388b46 Do not use dyn_cast<> after isa<>
Reported by coverity.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 00:27:57 +00:00
Joseph Tremoulet
d4a765f88a [WinEH] Require token linkage in EH pad/ret signatures
Summary:
WinEHPrepare is going to require that cleanuppad and catchpad produce values
of token type which are consumed by any cleanupret or catchret exiting the
pad.  This change updates the signatures of those operators to require/enforce
that the type produced by the pads is token type and that the rets have an
appropriate argument.

The catchpad argument of a `CatchReturnInst` must be a `CatchPadInst` (and
similarly for `CleanupReturnInst`/`CleanupPadInst`).  To accommodate that
restriction, this change adds a notion of an operator constraint to both
LLParser and BitcodeReader, allowing appropriate sentinels to be constructed
for forward references and appropriate error messages to be emitted for
illegal inputs.

Also add a verifier rule (noted in LangRef) that a catchpad with a catchpad
predecessor must have no other predecessors; this ensures that WinEHPrepare
will see the expected linear relationship between sibling catches on the
same try.

Lastly, remove some superfluous/vestigial casts from instruction operand
setters operating on BasicBlocks.

Reviewers: rnk, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-23 00:26:33 +00:00
David Blaikie
8647351e06 Update test case so it passes the verifier
Some debug info was drastically out of date, from the days where we used
to emit a list of length one (with a single null entry) rather than an
empty list (or, more recently, no list at all) for list fields that have
no elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 22:38:44 +00:00
David Blaikie
bfddc41d9c Verifier: Don't crash on null entries in debug info retained types list
There was already a good error path for this. Added a test for it & made
a minor code change to ensure the error path was actually reached,
rather than crashing before we got that far.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245795 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 22:36:40 +00:00
Davide Italiano
18fecd3d45 [llvm-readobj] Test --macho-data-in-code option.
As added bonus this converts an existing test from macho-dump to 
llvm-readobj. Only 66 to go.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245791 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 20:30:56 +00:00
Jingyue Wu
8724a428df [NVPTX] Allow undef value as global initializer
Summary:
__shared__ variable may now emit undef value as initializer, do not
throw error on that.

Test Plan: test/CodeGen/NVPTX/global-addrspace.ll

Patch by Xuetian Weng

Reviewers: jholewinski, tra, jingyue

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D12242

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 05:40:26 +00:00
NAKAMURA Takumi
fcaa24c56d [CMake] add_llvm_external_project: Just warn about nonexistent directories.
These entries were generated accidentally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245783 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 05:11:02 +00:00
NAKAMURA Takumi
44c617819c [CMake] Make LLVM_EXTERNAL_*_SOURCE_DIR consistent against older buildsites.
If corresponding in-tree subdirectory exists, just ignore LLVM_EXTERNAL* stuff.
Otherwise, set LLVM_TOOL_*_BUILD ON/OFF properly according to LLVM_EXTERNAL_*.

This makes easier to walk among old revisions *without* deleteing CMakeCache.txt.

Before r242059, LLVM_EXTERNAL_* was working like;

  if(EXISTS ${*_SOURCE_DIR}/CMakeLists.txt)
    set(*_BUILD ON CACHE)
    if(*_BUILD is ON)
      add_subdirectory(*_SOURCE_DIR)
    endif()
  endif()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245782 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 04:53:52 +00:00
Peter Collingbourne
c0346c0fdc LTO: Maintain target triple, FeatureStr and CGOptLevel in the module or LTOCodeGenerator.
This makes it easier to create new TargetMachines on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245781 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 02:25:53 +00:00
Matt Arsenault
19110099c0 AMDGPU: Allow specifying different opcode on VI for SMRD/SMEM
Although the basic s_load_* instructions happen to use the same
opcode, some of the special case SMRD instructions have
different opcodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 00:54:31 +00:00
Matt Arsenault
e48caeb48f AMDGPU: Improve accuracy of instruction rates for some FP instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 00:50:41 +00:00
Matt Arsenault
ac03979a67 AMDGPU: Use DFS to avoid second loop over function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245772 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-22 00:43:38 +00:00