Jim Laskey
f1b05bf755
1. Simplfy bit operations.
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2. Coalesce instruction cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29135 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-13 21:02:53 +00:00
Jim Laskey
ed393433d2
Move base value of instruction to lookup table to prepare for case reduction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29122 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 19:15:43 +00:00
Jim Laskey
16d42c6ac6
It was pointed out that DEBUG() is only available with -debug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 18:25:13 +00:00
Jim Laskey
e37fe9b3a1
Ensure that dump calls that are associated with asserts are removed from
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non-debug build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 17:58:07 +00:00
Jim Laskey
1406bdab85
Reduce bloat in target libraries by removing per machine instruction assertion
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from code emitter generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29097 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 01:25:59 +00:00
Chris Lattner
a539c03271
tblgen uses EH
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29034 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 00:21:17 +00:00
Evan Cheng
322812e603
Ugly hack! Add helper functions InsertInFlightSetEntry and
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RemoveInFlightSetEntry. They are used in place of direct set operators to
reduce instruction selection function stack size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28987 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 23:57:05 +00:00
Chris Lattner
02cdb377ec
Fix an error message regression. Print:
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LI8: (LI8:i64 (imm:i64):$imm)
instead of:
LI8: (LI8:MVT::i64 (imm:MVT::i64):$imm)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28868 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:56:37 +00:00
Chris Lattner
186fb7d131
Don't require src/dst patterns to be able to fully resolve their types,
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because information about one can help refine the other. This allows us to
write:
def : Pat<(i32 (extload xaddr:$src, i8)),
(LBZX xaddr:$src)>;
as:
def : Pat<(extload xaddr:$src, i8),
(LBZX xaddr:$src)>;
because tblgen knows LBZX returns i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28865 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:31:27 +00:00
Chris Lattner
a354849c27
Make sure to use the result of the pattern to infer the result type of the
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instruction, and the result type of the instruction to refine the pattern.
This allows us to write things like this:
def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (v2i64 VR128:$src)>;
as:
def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (VR128:$src)>
and fixes a ppc64 issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28863 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:18:02 +00:00
Chris Lattner
8f60d54fb1
Improve a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:25:06 +00:00
Evan Cheng
8d3af5e7d0
Instructions with variable operands (variable_ops) can have a number required
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operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
"call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.
Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 07:22:16 +00:00
Evan Cheng
d7c2c86239
Allow more use of iPTR in patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28790 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 00:16:37 +00:00
Evan Cheng
e945f4d3d4
Added support for variable_ops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 22:22:20 +00:00
Evan Cheng
bc6b86a89e
Fix support for optional input flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28784 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 19:27:50 +00:00
Evan Cheng
50c997e26a
getOperandNum(): error if specified operand number is out of range.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28775 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 21:47:27 +00:00
Chris Lattner
11bcd28dff
Wrap to 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-09 23:59:44 +00:00
Reid Spencer
d386e55e33
Don't build tblgen with -pedantic or -Wno-long-long
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28638 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 18:20:23 +00:00
Evan Cheng
553ef1be94
Can't trust NodeDepth when checking for possibility of load folding creating
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a cycle. This increase the search space and will increase compile time (in
practice it appears to be small, e.g. 176.gcc goes from 62 sec to 65 sec)
that will be addressed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28476 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 20:16:55 +00:00
Evan Cheng
b0793f9741
Fixed a really ugly bug. The TableGen'd isel is not freeing the "inflight set"
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correctly. That is causing non-deterministic behavior (and possibly preventing
some load folding from happening).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28458 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:21:44 +00:00
Chris Lattner
243be2c80d
Don't make zero-sized static arrays
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28448 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 17:31:02 +00:00
Chris Lattner
d74ea2bbd8
Patches to make the LLVM sources more -pedantic clean. Patch provided
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by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 17:04:05 +00:00
Evan Cheng
d15531b430
Now that iPTR is a fully resolved type. We end up losing the type check for
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patterns that look like this:
def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>;
InsertOneTypeCheck should copy the type from the resolved pattern to the
unresolved one as long as there types are different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28389 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-19 07:24:32 +00:00
Evan Cheng
21d03f2de0
lib/Target/Target.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18 20:42:07 +00:00
Evan Cheng
764811f145
Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18 00:08:46 +00:00
Evan Cheng
6b12516f1a
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 20:55:51 +00:00
Evan Cheng
2618d07765
Remove PointerType from target definition. Use abstract type MVT::iPTR to
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represent pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28363 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 20:37:59 +00:00
Evan Cheng
44a65fa552
Allow patterns to refer to physical registers that belong to multiple
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register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28323 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 07:05:30 +00:00
Evan Cheng
9812f1ca97
Noop instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 07:47:00 +00:00
Evan Cheng
d9d4518a86
Unused instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28240 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 07:42:01 +00:00
Evan Cheng
2ca0efd71a
Also add super- register classes info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28221 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11 07:30:26 +00:00
Evan Cheng
3eff89bf89
Watch out for the following case:
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1. Use expects a chain output.
2. Node is expanded into multiple target ops.
3. One of the inner node produces a chain, the outer most one doesn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28209 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-10 02:47:57 +00:00
Evan Cheng
045953c37a
Fix a load folding bug. It is exposed by a multi- resulting instructions
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def : Pat<> pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28208 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-10 00:05:46 +00:00
Evan Cheng
8d58e6a9be
Add sub-register class information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28195 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 06:34:26 +00:00
Evan Cheng
108714c14f
Set isStore of instructions with ISD::TRUNCSTORE root node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28075 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 02:08:34 +00:00
Chris Lattner
eff5c36238
Put instruction names into the first non TargetInstrInfo namespace found.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28043 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 23:46:16 +00:00
Chris Lattner
a1e8a80b96
instructions can be in different namespaces. Make sure to use the right
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one for each instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28038 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 17:01:17 +00:00
Evan Cheng
afba446d99
Formating
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28036 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 09:30:17 +00:00
Evan Cheng
6f6360d9ab
Mark instructions whose pattern is (store ...) isStore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28032 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 09:04:20 +00:00
Evan Cheng
55d0fa1bfa
Remove the temporary option: -no-isel-fold-inflight
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28012 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 18:54:11 +00:00
Evan Cheng
61a0209a8a
When isel'ing a node, mark its operands "InFlight" before selecting them. These
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nodes should not be folded into other nodes.
This fixes the miscompilation of PR 749.
Temporarily under flag control.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28002 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 02:08:10 +00:00
Nate Begeman
37efe67645
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Chris Lattner
719c2fc97f
Don't fill in fields that no longer exist.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 18:32:22 +00:00
Evan Cheng
c81d2a041d
Rename AddedCost to AddedComplexity.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27841 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:36:09 +00:00
Evan Cheng
5941320c0d
Allow "let AddedCost = n in" to increase pattern complexity.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27834 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 18:07:24 +00:00
Reid Spencer
28421d0a80
Add missing things to the distribution.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27650 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 06:27:20 +00:00
Chris Lattner
4b2362e247
Fix a typo: Instr* -> Intr*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27568 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 22:02:59 +00:00
Chris Lattner
91ded08224
Infer element types for shuffle masks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27456 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 20:36:51 +00:00
Chris Lattner
52793e2c41
rename a method, to avoid confusion with llvm intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27455 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 20:19:52 +00:00
Chris Lattner
5348e393df
Adjust the Intrinsics.gen interface a little bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27345 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:35:30 +00:00