Commit Graph

132578 Commits

Author SHA1 Message Date
Simon Pilgrim
55494e1f78 [X86][AVX] Regenerated avx upgraded intrinsics tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270422 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 12:39:06 +00:00
Diana Picus
a466b7ce58 [BPF] Remove exit-on-error flag in test (PR27766)
The exit-on-error flag on the many_args1.ll test is needed to avoid an
unreachable in BPFTargetLowering::LowerCall. We can also avoid it by ignoring
any superfluous arguments to the call (i.e. any arguments after the first 5).

Fixes PR27766

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270419 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 12:33:34 +00:00
Chris Dewhurst
3c9099dfec [Sparc] LEON erratum fix - Delay Slot Filler modification.
This code should have been with the previous check-in (r270417) and prevents the DelaySlotFiller pass being utilized in functions where the erratum fix has been applied as this will break the run-time code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270418 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 11:52:28 +00:00
Chris Dewhurst
69e68a5966 [Sparc][LEON] LEON Erratum fix. Insert NOP after LD or LDF instruction.
Due to an erratum in some versions of LEON, we must insert a NOP after any LD or LDF instruction to ensure the processor has time to load the value correctly before using it. This pass will implement that erratum fix.

The code will have no effect for other Sparc, but non-LEON processors.

Differential Review: http://reviews.llvm.org/D20353

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270417 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 10:56:36 +00:00
Sam Kolton
f7363d583b [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms.
Reviewers: nhaustov, tstellarAMD

Subscribers: kzhuravl, arsenm

Differential Revision: http://reviews.llvm.org/D20166

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270415 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 09:59:02 +00:00
Jacob Baungard Hansen
df232b13b3 Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270414 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 09:41:44 +00:00
Davide Italiano
fb56e1a36f [SCCP] Update comment to reflect reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270413 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 09:34:50 +00:00
Richard Smith
5d0c349a51 Enable use of sigaltstack for signal handlers when available. With this,
backtraces from the signal handler on stack overflow now work reliably (on my
system at least...).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270395 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 06:47:37 +00:00
Craig Topper
4de68f2b6c [X86] Use instruction aliases to replace custom asm parser code for optimizing moves to use 2 byte VEX prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270394 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 04:02:27 +00:00
David Majnemer
b06908a171 Revert "Modify emitTypeInformation to use MemoryTypeTableBuilder"
This reverts commit r270106.  It results in certain function types
omitted in the output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270389 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-23 01:37:45 +00:00
Craig Topper
23e51e1ea1 [AVX512] Add patterns to implement stores of extracts of least signficant subvectors using XMM or YMM stores instead of the vector extract instructions.
Similar is already done for AVX and we had lost it going to AVX512VL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270383 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 23:44:33 +00:00
Lang Hames
60e94e81eb [Kaleidoscope] Fix static global ordering to prevent crash on exit.
If TheModule is declared before LLVMContext then it will be destructed after it,
crashing when it tries to deregister itself from the destructed context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270381 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 22:48:36 +00:00
Simon Pilgrim
9a4c9f3b35 [X86][SSE] Added extra i8 extract element test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270379 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 20:35:42 +00:00
Sanjay Patel
51a995642a [x86, AVX] don't add a vzeroupper if that's what the code is already doing (PR27823)
This isn't the complete fix, but it handles the trivial examples of duplicate vzero* ops in PR27823:
https://llvm.org/bugs/show_bug.cgi?id=27823
...and amusingly, the bogus cases already exist as regression tests, so let's take this baby step.

We'll need to do more in the general case where there's legitimate AVX usage in the function + there's
already a vzero in the code.

Differential Revision: http://reviews.llvm.org/D20477



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270378 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 20:22:47 +00:00
Sanjay Patel
86d4c5562d [x86, AVX] add test file to show vzeroupper pass excesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270375 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 19:55:48 +00:00
Sanjay Patel
3684019e63 reduce indent; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270372 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 17:08:52 +00:00
Sanjay Patel
5afdcbe0c7 use 'auto' with 'dyn_cast'; fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270370 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 16:07:20 +00:00
Sanjay Patel
56708009f1 [ValueTracking, InstCombine] extend isKnownToBeAPowerOfTwo() to handle vector splat constants
We could try harder to handle non-splat vector constants too, 
but that seems much rarer to me.

Note that the div test isn't resolved because there's a check
for isIntegerTy() guarding that transform.

Differential Revision: http://reviews.llvm.org/D20497



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270369 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 15:41:53 +00:00
Igor Breger
e88a780fc5 [AVX512] Implement missing patterns for any_extend load lowering.
Differential Revision: http://reviews.llvm.org/D20513

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270357 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 10:21:04 +00:00
Craig Topper
e52b875fea [AVX512] The AVX512 file only need subtract_subvector index 0 patterns where the source is 512-bits. The 256-bit source patterns were redundant with AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270356 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 07:40:58 +00:00
Craig Topper
cdd08e2610 [AVX512] Add an AddedComplexity line to the 512-bit insert_subvector undef index 0 patterns. This gives them higher priority than the memory patterns. This matches AVX1/2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270355 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 07:40:40 +00:00
Craig Topper
533c92cdd5 [AVX512] Change the AddedComplexity on some patterns to match their AVX/SSE equivalents. This helps group them close together in the isel tables and enable table compression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270354 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 06:09:34 +00:00
Xinliang David Li
b5023a0845 bug fix: trim section specifier name length
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270349 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 01:21:21 +00:00
Craig Topper
9c5f275934 [X86] Add a common check-prefix to both run lines on a test so identical checks appear just once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270345 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 00:39:33 +00:00
Craig Topper
6a96e9fdad [AVX512] Add a couple patterns to fix some cases where two vector mask inversions could appear in a row.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270344 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 00:39:30 +00:00
Craig Topper
6938cca155 [AVX512] Remove seemingly unnecessary AddedComplexity adjustment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270343 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-22 00:39:27 +00:00
Xinliang David Li
ad650ee545 [profile] Static counter allocation for value profiling (part-1)
Differential Revision: http://reviews.llvm.org/D20459



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270336 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:55:34 +00:00
Craig Topper
7b297a76d7 [X86] Remove unnecessary alignment check on patterns that use VEXTRACTF128 for integer types when only AVX1 is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270335 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:18 +00:00
Craig Topper
022094446e [AVX512] Add patterns for extracting subvectors and storing to memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270334 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:14 +00:00
Craig Topper
3b51b4692e [AVX512] Capitalize the Z in VEXTRACTPSzmr. Lowercase z has been primarily used to indicating the zero masking behavior which is not the case here. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270333 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:11 +00:00
Craig Topper
aca352c053 [AVX512] Rename vector extract instructions so 'mr' intead of 'rm' to reflect the fact that memory is the destination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270332 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:09 +00:00
Craig Topper
23d0d8909d [AVX512] Fix copy/paste mistake a I made in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270331 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:04 +00:00
Chad Rosier
7143168577 Fix 80-column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270329 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 21:12:06 +00:00
Hal Finkel
8fdeacc0ca [LiveIntervalAnalysis] Don't dereference an end iterator in repairIntervalsInRange
This fixes a bug introduced in:

  r262115 - CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC

The iterator End here might == MBB->end(), and so we can't unconditionally
dereference it. This often goes unnoticed (I don't have a test case that always
crashes, and ASAN does not catch it either) because the function call arguments are
turned right back into iterators. MachineInstrBundleIterator's constructor,
however, does have an assert which might randomly fire.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270323 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 16:03:50 +00:00
Michael Zuckerman
e90b7d501e [Clang][AVX512][intrinsics] Fix rcp and sqrt intrinsics.
Differential Revision: http://reviews.llvm.org/D20438


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270322 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 14:44:18 +00:00
Michael Zuckerman
981df2f2ac [Clang][AVX512][intrinsics] Fix vscalef intrinsics.
Differential Revision: http://reviews.llvm.org/D20324


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270321 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 11:09:53 +00:00
George Rimar
e73be5ff27 [llvm-readobj] - Teach readobj to recognize SHF_COMPRESSED flag.
Main problem here was that SHF_COMPRESSED has the same value with
XCORE_SHF_CP_SECTION, which was included as standart (common) flag.
As far I understand xCore is a family of controllers and it that
means it's constant should be processed separately,
only if e_machine == EM_XCORE, otherwise llvm-readobj would output
different constants twice for compressed section:

Flags [
..
SHF_COMPRESSED (0x800)
..
XCORE_SHF_CP_SECTION (0x800)
..
]

what probably does not make sence if you're not working with xcore file.

Differential revision: http://reviews.llvm.org/D20273

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270320 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 10:16:58 +00:00
Craig Topper
945c4ac1dc [AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable AVX2 versions of vector extract when AVX512VL is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270318 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 07:08:56 +00:00
Craig Topper
a798097945 [AVX512] Disable AVX2 VPERMD, VPERMQ, VPERMPS, and VPERMPD patterns when AVX512VL is enabled. Also add shuffle comment printing for AVX512VL VPERMPD/VPERMQ to keep some tests that now use these instructions instead of the AVX2 ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270317 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 06:07:18 +00:00
Craig Topper
55ce98c47e [AVX512] Disable AVX/AVX2 VBROADCASTSS/VBROADCASTSD patterns when AVX512VL is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270316 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 05:47:25 +00:00
Craig Topper
0b20b65b6e [AVX512] Use update_llc_test_checks to update some tests so we can see all the instruction encodings and ensure everything is with EVEX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270315 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 05:46:58 +00:00
David Majnemer
3785891684 [SimplifyCFG] Remove cleanuppads which are empty except for calls to lifetime.end
A cleanuppad is not cheap, they turn into many instructions and result
in additional spills and fills.  It is not worth keeping a cleanuppad
around if all it does is hold a lifetime.end instruction.

N.B.  We first try to merge the cleanuppad with another cleanuppad to
avoid dropping the lifetime and debug info markers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270314 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 05:12:32 +00:00
Craig Topper
1dd3d1b5f5 [AVX512] Fix test cases I missed in r270311.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270313 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:59:55 +00:00
Matt Arsenault
03ca6fb151 AMDGPU: Define priorities for register classes
Allocating larger register classes first should give better allocation
results (and more importantly for myself, make the lit tests more stable
with respect to scheduler changes).

Patch by Matthias Braun

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270312 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:55:07 +00:00
Craig Topper
2cec448db5 [AVX512] Disable AVX/AVX2 patterns for VPSADBW and VPMULUDQ when the AVX512VL/AVX512BWI equivalents are available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270311 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:52:32 +00:00
Craig Topper
cb70dc6a28 [X86] Convert some SSE2/AVX2 intrinsics to ISD opcodes during lowering instead of pattern matching the intrinsics. This unifies handling with AVX512 and allows these intrinsics to select EVEX encoded instructions to increase available registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270310 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:52:28 +00:00
Sanjoy Das
7a3bcbc7cf [IRCE] Don't use an allocator for range checks; NFC
The InductiveRangeCheck struct is only five words long; so passing these
around value is fine.  The allocator makes the code look more complex
than it is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270309 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:52:13 +00:00
Sanjoy Das
d874a39835 [IRCE] Don't pass IRBuilder<> where unnecessary; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270308 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:31:51 +00:00
Matt Arsenault
be522c6214 AMDGPU: Cleanup lowering actions
These are kind of a mess and hard to follow, particularly
for loads and stores. Fix various redundant, unnecessary
and dead settings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270307 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:27:49 +00:00
Sanjoy Das
c17e533ca7 [GuardWidening] Fix incorrect use of remove_if
I had used `std::remove_if` under the assumption that it moves the
predicate matching elements to the end, but actaully the elements
remaining towards the end (after the iterator returned by
`std::remove_if`) are indeterminate.  Fix the bug (and make the code
more straightforward) by using a temporary SmallVector, and add a test
case demonstrating the issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270306 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:24:44 +00:00