; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -instcombine -S < %s | FileCheck %s define i32 @test1(i32 %x) { ; CHECK-LABEL: @test1( ; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 31 ; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[AND]], 63 ; CHECK-NEXT: ret i32 [[SUB]] ; %and = and i32 %x, 31 %sub = sub i32 63, %and ret i32 %sub } define <2 x i32> @test1vec(<2 x i32> %x) { ; CHECK-LABEL: @test1vec( ; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, ; CHECK-NEXT: [[SUB:%.*]] = xor <2 x i32> [[AND]], ; CHECK-NEXT: ret <2 x i32> [[SUB]] ; %and = and <2 x i32> %x, %sub = sub <2 x i32> , %and ret <2 x i32> %sub } declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone define i32 @test2(i32 %x) nounwind { ; CHECK-LABEL: @test2( ; CHECK-NEXT: [[COUNT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true) #0 ; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[COUNT]], 31 ; CHECK-NEXT: ret i32 [[SUB]] ; %count = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true) nounwind readnone %sub = sub i32 31, %count ret i32 %sub } define i32 @test3(i32 %x) { ; CHECK-LABEL: @test3( ; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 31 ; CHECK-NEXT: [[ADD:%.*]] = sub nsw i32 73, [[AND]] ; CHECK-NEXT: ret i32 [[ADD]] ; %and = and i32 %x, 31 %sub = xor i32 31, %and %add = add i32 %sub, 42 ret i32 %add }