LLVM Language Reference Manual

Overview:

The integer type is a very simple type that simply specifies an arbitrary bit width for the integer type desired. Any bit width from 1 bit to 2²³-1 (about 8 million) can be specified.

Syntax:

  iN

The number of bits the integer will occupy is specified by the N value.

Examples:

Overview:

The x86mmx type represents a value held in an MMX register on an x86 machine. The operations allowed on it are quite limited: parameters and return values, load and store, and bitcast. User-specified MMX instructions are represented as intrinsic or asm calls with arguments and/or results of this type. There are no arrays, vectors or constants of this type.

Syntax:

  x86mmx

Overview:

The void type does not represent any value and has no size.

Syntax:

  void

Overview:

The label type represents code labels.

Syntax:

  label

Overview:

The metadata type represents embedded metadata. No derived types may be created from metadata except for function arguments.

Syntax:

  metadata

The call instructions that wrap inline asm nodes may have a "!srcloc" MDNode attached to it that contains a list of constant integers. If present, the code generator will use the integer as the location cookie value when report errors through the LLVMContext error reporting mechanisms. This allows a front-end to correlate backend errors that occur with inline asm back to the source code that produced it. For example:

call void asm sideeffect "something bad", ""(), !srcloc !42
...
!42 = !{ i32 1234567 }

It is up to the front-end to make sense of the magic numbers it places in the IR. If the MDNode contains multiple constants, the code generator will use the one that corresponds to the line of the asm that the error occurs on.

Syntax:

  ret <type> <value>       ; Return a value from a non-void function
  ret void                 ; Return from void function

Overview:

The 'ret' instruction is used to return control flow (and optionally a value) from a function back to the caller.

There are two forms of the 'ret' instruction: one that returns a value and then causes control flow, and one that just causes control flow to occur.

Arguments:

The 'ret' instruction optionally accepts a single argument, the return value. The type of the return value must be a 'first class' type.

A function is not well formed if it it has a non-void return type and contains a 'ret' instruction with no return value or a return value with a type that does not match its type, or if it has a void return type and contains a 'ret' instruction with a return value.

Semantics:

When the 'ret' instruction is executed, control flow returns back to the calling function's context. If the caller is a "call" instruction, execution continues at the instruction after the call. If the caller was an "invoke" instruction, execution continues at the beginning of the "normal" destination block. If the instruction returns a value, that value shall set the call or invoke instruction's return value.

Example:

  ret i32 5                       ; Return an integer value of 5
  ret void                        ; Return from a void function
  ret { i32, i8 } { i32 4, i8 2 } ; Return a struct of values 4 and 2

Syntax:

  br i1 <cond>, label <iftrue>, label <iffalse>
  br label <dest>          ; Unconditional branch

Overview:

The 'br' instruction is used to cause control flow to transfer to a different basic block in the current function. There are two forms of this instruction, corresponding to a conditional branch and an unconditional branch.

Arguments:

The conditional branch form of the 'br' instruction takes a single 'i1' value and two 'label' values. The unconditional form of the 'br' instruction takes a single 'label' value as a target.

Semantics:

Upon execution of a conditional 'br' instruction, the 'i1' argument is evaluated. If the value is true, control flows to the 'iftrue' label argument. If "cond" is false, control flows to the 'iffalse' label argument.

Example:

Test:
  %cond = icmp eq i32 %a, %b
  br i1 %cond, label %IfEqual, label %IfUnequal
IfEqual:
  ret i32 1
IfUnequal:
  ret i32 0

Syntax:

  switch <intty> <value>, label <defaultdest> [ <intty> <val>, label <dest> ... ]

Overview:

The 'switch' instruction is used to transfer control flow to one of several different places. It is a generalization of the 'br' instruction, allowing a branch to occur to one of many possible destinations.

Arguments:

The 'switch' instruction uses three parameters: an integer comparison value 'value', a default 'label' destination, and an array of pairs of comparison value constants and 'label's. The table is not allowed to contain duplicate constant entries.

Semantics:

The switch instruction specifies a table of values and destinations. When the 'switch' instruction is executed, this table is searched for the given value. If the value is found, control flow is transferred to the corresponding destination; otherwise, control flow is transferred to the default destination.

Implementation:

Depending on properties of the target machine and the particular switch instruction, this instruction may be code generated in different ways. For example, it could be generated as a series of chained conditional branches or with a lookup table.

Example:

 ; Emulate a conditional br instruction
 %Val = zext i1 %value to i32
 switch i32 %Val, label %truedest [ i32 0, label %falsedest ]

 ; Emulate an unconditional br instruction
 switch i32 0, label %dest [ ]

 ; Implement a jump table:
 switch i32 %val, label %otherwise [ i32 0, label %onzero
                                     i32 1, label %onone
                                     i32 2, label %ontwo ]

Syntax:

  indirectbr <somety>* <address>, [ label <dest1>, label <dest2>, ... ]

Overview:

The 'indirectbr' instruction implements an indirect branch to a label within the current function, whose address is specified by "address". Address must be derived from a blockaddress constant.

Arguments:

The 'address' argument is the address of the label to jump to. The rest of the arguments indicate the full set of possible destinations that the address may point to. Blocks are allowed to occur multiple times in the destination list, though this isn't particularly useful.

This destination list is required so that dataflow analysis has an accurate understanding of the CFG.

Semantics:

Control transfers to the block specified in the address argument. All possible destination blocks must be listed in the label list, otherwise this instruction has undefined behavior. This implies that jumps to labels defined in other functions have undefined behavior as well.

Implementation:

This is typically implemented with a jump through a register.

Example:

 indirectbr i8* %Addr, [ label %bb1, label %bb2, label %bb3 ]

Syntax:

  <result> = invoke [cconv] [ret attrs] <ptr to function ty> <function ptr val>(<function args>) [fn attrs]
                to label <normal label> unwind label <exception label>

Overview:

The 'invoke' instruction causes control to transfer to a specified function, with the possibility of control flow transfer to either the 'normal' label or the 'exception' label. If the callee function returns with the "ret" instruction, control flow will return to the "normal" label. If the callee (or any indirect callees) returns with the "unwind" instruction, control is interrupted and continued at the dynamically nearest "exception" label.

The 'exception' label is a landing pad for the exception. As such, 'exception' label is required to have the "landingpad" instruction, which contains the information about about the behavior of the program after unwinding happens, as its first non-PHI instruction. The restrictions on the "landingpad" instruction's tightly couples it to the "invoke" instruction, so that the important information contained within the "landingpad" instruction can't be lost through normal code motion.

Arguments:

This instruction requires several arguments:

1. The optional "cconv" marker indicates which calling convention the call should use. If none is specified, the call defaults to using C calling conventions.
2. The optional Parameter Attributes list for return values. Only 'zeroext', 'signext', and 'inreg' attributes are valid here.
3. 'ptr to function ty': shall be the signature of the pointer to function value being invoked. In most cases, this is a direct function invocation, but indirect invokes are just as possible, branching off an arbitrary pointer to function value.
4. 'function ptr val': An LLVM value containing a pointer to a function to be invoked.
5. 'function args': argument list whose types match the function signature argument types and parameter attributes. All arguments must be of first class type. If the function signature indicates the function accepts a variable number of arguments, the extra arguments can be specified.
6. 'normal label': the label reached when the called function executes a 'ret' instruction.
7. 'exception label': the label reached when a callee returns with the unwind instruction.
8. The optional function attributes list. Only 'noreturn', 'nounwind', 'readonly' and 'readnone' attributes are valid here.

Semantics:

This instruction is designed to operate as a standard 'call' instruction in most regards. The primary difference is that it establishes an association with a label, which is used by the runtime library to unwind the stack.

This instruction is used in languages with destructors to ensure that proper cleanup is performed in the case of either a longjmp or a thrown exception. Additionally, this is important for implementation of 'catch' clauses in high-level languages that support them.

For the purposes of the SSA form, the definition of the value returned by the 'invoke' instruction is deemed to occur on the edge from the current block to the "normal" label. If the callee unwinds then no return value is available.

Note that the code generator does not yet completely support unwind, and that the invoke/unwind semantics are likely to change in future versions.

Example:

  %retval = invoke i32 @Test(i32 15) to label %Continue
              unwind label %TestCleanup              ; {i32}:retval set
  %retval = invoke coldcc i32 %Testfnptr(i32 15) to label %Continue
              unwind label %TestCleanup              ; {i32}:retval set

Syntax:

  unwind

Overview:

The 'unwind' instruction unwinds the stack, continuing control flow at the first callee in the dynamic call stack which used an invoke instruction to perform the call. This is primarily used to implement exception handling.

Semantics:

The 'unwind' instruction causes execution of the current function to immediately halt. The dynamic call stack is then searched for the first invoke instruction on the call stack. Once found, execution continues at the "exceptional" destination block specified by the invoke instruction. If there is no invoke instruction in the dynamic call chain, undefined behavior results.

Note that the code generator does not yet completely support unwind, and that the invoke/unwind semantics are likely to change in future versions.

Syntax:

  resume <type> <value>

Overview:

The 'resume' instruction is a terminator instruction that has no successors.

Arguments:

The 'resume' instruction requires one argument, which must have the same type as the result of any 'landingpad' instruction in the same function.

Semantics:

The 'resume' instruction resumes propagation of an existing (in-flight) exception whose unwinding was interrupted with a landingpad instruction.

Example:

  resume { i8*, i32 } %exn

Syntax:

  unreachable

Overview:

The 'unreachable' instruction has no defined semantics. This instruction is used to inform the optimizer that a particular portion of the code is not reachable. This can be used to indicate that the code after a no-return function cannot be reached, and other facts.

Semantics:

The 'unreachable' instruction has no defined semantics.

Syntax:

  <result> = add <ty> <op1>, <op2>          ; yields {ty}:result
  <result> = add nuw <ty> <op1>, <op2>      ; yields {ty}:result
  <result> = add nsw <ty> <op1>, <op2>      ; yields {ty}:result
  <result> = add nuw nsw <ty> <op1>, <op2>  ; yields {ty}:result

Overview:

The 'add' instruction returns the sum of its two operands.

Arguments:

The two arguments to the 'add' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the integer sum of the two operands.

If the sum has unsigned overflow, the result returned is the mathematical result modulo 2ⁿ, where n is the bit width of the result.

Because LLVM integers use a two's complement representation, this instruction is appropriate for both signed and unsigned integers.

nuw and nsw stand for "No Unsigned Wrap" and "No Signed Wrap", respectively. If the nuw and/or nsw keywords are present, the result value of the add is a trap value if unsigned and/or signed overflow, respectively, occurs.

Example:

  <result> = add i32 4, %var          ; yields {i32}:result = 4 + %var

Syntax:

  <result> = fadd <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'fadd' instruction returns the sum of its two operands.

Arguments:

The two arguments to the 'fadd' instruction must be floating point or vector of floating point values. Both arguments must have identical types.

Semantics:

The value produced is the floating point sum of the two operands.

Example:

  <result> = fadd float 4.0, %var          ; yields {float}:result = 4.0 + %var

Syntax:

  <result> = sub <ty> <op1>, <op2>          ; yields {ty}:result
  <result> = sub nuw <ty> <op1>, <op2>      ; yields {ty}:result
  <result> = sub nsw <ty> <op1>, <op2>      ; yields {ty}:result
  <result> = sub nuw nsw <ty> <op1>, <op2>  ; yields {ty}:result

Overview:

The 'sub' instruction returns the difference of its two operands.

Note that the 'sub' instruction is used to represent the 'neg' instruction present in most other intermediate representations.

Arguments:

The two arguments to the 'sub' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the integer difference of the two operands.

If the difference has unsigned overflow, the result returned is the mathematical result modulo 2ⁿ, where n is the bit width of the result.

Because LLVM integers use a two's complement representation, this instruction is appropriate for both signed and unsigned integers.

nuw and nsw stand for "No Unsigned Wrap" and "No Signed Wrap", respectively. If the nuw and/or nsw keywords are present, the result value of the sub is a trap value if unsigned and/or signed overflow, respectively, occurs.

Example:

  <result> = sub i32 4, %var          ; yields {i32}:result = 4 - %var
  <result> = sub i32 0, %val          ; yields {i32}:result = -%var

Syntax:

  <result> = fsub <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'fsub' instruction returns the difference of its two operands.

Note that the 'fsub' instruction is used to represent the 'fneg' instruction present in most other intermediate representations.

Arguments:

The two arguments to the 'fsub' instruction must be floating point or vector of floating point values. Both arguments must have identical types.

Semantics:

The value produced is the floating point difference of the two operands.

Example:

  <result> = fsub float 4.0, %var           ; yields {float}:result = 4.0 - %var
  <result> = fsub float -0.0, %val          ; yields {float}:result = -%var

Syntax:

  <result> = mul <ty> <op1>, <op2>          ; yields {ty}:result
  <result> = mul nuw <ty> <op1>, <op2>      ; yields {ty}:result
  <result> = mul nsw <ty> <op1>, <op2>      ; yields {ty}:result
  <result> = mul nuw nsw <ty> <op1>, <op2>  ; yields {ty}:result

Overview:

The 'mul' instruction returns the product of its two operands.

Arguments:

The two arguments to the 'mul' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the integer product of the two operands.

If the result of the multiplication has unsigned overflow, the result returned is the mathematical result modulo 2ⁿ, where n is the bit width of the result.

Because LLVM integers use a two's complement representation, and the result is the same width as the operands, this instruction returns the correct result for both signed and unsigned integers. If a full product (e.g. i32xi32->i64) is needed, the operands should be sign-extended or zero-extended as appropriate to the width of the full product.

nuw and nsw stand for "No Unsigned Wrap" and "No Signed Wrap", respectively. If the nuw and/or nsw keywords are present, the result value of the mul is a trap value if unsigned and/or signed overflow, respectively, occurs.

Example:

  <result> = mul i32 4, %var          ; yields {i32}:result = 4 * %var

Syntax:

  <result> = fmul <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'fmul' instruction returns the product of its two operands.

Arguments:

The two arguments to the 'fmul' instruction must be floating point or vector of floating point values. Both arguments must have identical types.

Semantics:

The value produced is the floating point product of the two operands.

Example:

  <result> = fmul float 4.0, %var          ; yields {float}:result = 4.0 * %var

Syntax:

  <result> = udiv <ty> <op1>, <op2>         ; yields {ty}:result
  <result> = udiv exact <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'udiv' instruction returns the quotient of its two operands.

Arguments:

The two arguments to the 'udiv' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the unsigned integer quotient of the two operands.

Note that unsigned integer division and signed integer division are distinct operations; for signed integer division, use 'sdiv'.

Division by zero leads to undefined behavior.

If the exact keyword is present, the result value of the udiv is a trap value if %op1 is not a multiple of %op2 (as such, "((a udiv exact b) mul b) == a").

Example:

  <result> = udiv i32 4, %var          ; yields {i32}:result = 4 / %var

Syntax:

  <result> = sdiv <ty> <op1>, <op2>         ; yields {ty}:result
  <result> = sdiv exact <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'sdiv' instruction returns the quotient of its two operands.

Arguments:

The two arguments to the 'sdiv' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The value produced is the signed integer quotient of the two operands rounded towards zero.

Note that signed integer division and unsigned integer division are distinct operations; for unsigned integer division, use 'udiv'.

Division by zero leads to undefined behavior. Overflow also leads to undefined behavior; this is a rare case, but can occur, for example, by doing a 32-bit division of -2147483648 by -1.

If the exact keyword is present, the result value of the sdiv is a trap value if the result would be rounded.

Example:

  <result> = sdiv i32 4, %var          ; yields {i32}:result = 4 / %var

Syntax:

  <result> = fdiv <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'fdiv' instruction returns the quotient of its two operands.

Arguments:

The two arguments to the 'fdiv' instruction must be floating point or vector of floating point values. Both arguments must have identical types.

Semantics:

The value produced is the floating point quotient of the two operands.

Example:

  <result> = fdiv float 4.0, %var          ; yields {float}:result = 4.0 / %var

Syntax:

  <result> = urem <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'urem' instruction returns the remainder from the unsigned division of its two arguments.

Arguments:

The two arguments to the 'urem' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

This instruction returns the unsigned integer remainder of a division. This instruction always performs an unsigned division to get the remainder.

Note that unsigned integer remainder and signed integer remainder are distinct operations; for signed integer remainder, use 'srem'.

Taking the remainder of a division by zero leads to undefined behavior.

Example:

  <result> = urem i32 4, %var          ; yields {i32}:result = 4 % %var

Syntax:

  <result> = srem <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'srem' instruction returns the remainder from the signed division of its two operands. This instruction can also take vector versions of the values in which case the elements must be integers.

Arguments:

The two arguments to the 'srem' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

This instruction returns the remainder of a division (where the result is either zero or has the same sign as the dividend, op1), not the modulo operator (where the result is either zero or has the same sign as the divisor, op2) of a value. For more information about the difference, see The Math Forum. For a table of how this is implemented in various languages, please see Wikipedia: modulo operation.

Note that signed integer remainder and unsigned integer remainder are distinct operations; for unsigned integer remainder, use 'urem'.

Taking the remainder of a division by zero leads to undefined behavior. Overflow also leads to undefined behavior; this is a rare case, but can occur, for example, by taking the remainder of a 32-bit division of -2147483648 by -1. (The remainder doesn't actually overflow, but this rule lets srem be implemented using instructions that return both the result of the division and the remainder.)

Example:

  <result> = srem i32 4, %var          ; yields {i32}:result = 4 % %var

Syntax:

  <result> = frem <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'frem' instruction returns the remainder from the division of its two operands.

Arguments:

The two arguments to the 'frem' instruction must be floating point or vector of floating point values. Both arguments must have identical types.

Semantics:

This instruction returns the remainder of a division. The remainder has the same sign as the dividend.

Example:

  <result> = frem float 4.0, %var          ; yields {float}:result = 4.0 % %var

Syntax:

  <result> = shl <ty> <op1>, <op2>           ; yields {ty}:result
  <result> = shl nuw <ty> <op1>, <op2>       ; yields {ty}:result
  <result> = shl nsw <ty> <op1>, <op2>       ; yields {ty}:result
  <result> = shl nuw nsw <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'shl' instruction returns the first operand shifted to the left a specified number of bits.

Arguments:

Both arguments to the 'shl' instruction must be the same integer or vector of integer type. 'op2' is treated as an unsigned value.

Semantics:

The value produced is op1 * 2^op2 mod 2ⁿ, where n is the width of the result. If op2 is (statically or dynamically) negative or equal to or larger than the number of bits in op1, the result is undefined. If the arguments are vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

If the nuw keyword is present, then the shift produces a trap value if it shifts out any non-zero bits. If the nsw keyword is present, then the shift produces a trap value if it shifts out any bits that disagree with the resultant sign bit. As such, NUW/NSW have the same semantics as they would if the shift were expressed as a mul instruction with the same nsw/nuw bits in (mul %op1, (shl 1, %op2)).

Example:

  <result> = shl i32 4, %var   ; yields {i32}: 4 << %var
  <result> = shl i32 4, 2      ; yields {i32}: 16
  <result> = shl i32 1, 10     ; yields {i32}: 1024
  <result> = shl i32 1, 32     ; undefined
  <result> = shl <2 x i32> < i32 1, i32 1>, < i32 1, i32 2>   ; yields: result=<2 x i32> < i32 2, i32 4>

Syntax:

  <result> = lshr <ty> <op1>, <op2>         ; yields {ty}:result
  <result> = lshr exact <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'lshr' instruction (logical shift right) returns the first operand shifted to the right a specified number of bits with zero fill.

Arguments:

Both arguments to the 'lshr' instruction must be the same integer or vector of integer type. 'op2' is treated as an unsigned value.

Semantics:

This instruction always performs a logical shift right operation. The most significant bits of the result will be filled with zero bits after the shift. If op2 is (statically or dynamically) equal to or larger than the number of bits in op1, the result is undefined. If the arguments are vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

If the exact keyword is present, the result value of the lshr is a trap value if any of the bits shifted out are non-zero.

Example:

  <result> = lshr i32 4, 1   ; yields {i32}:result = 2
  <result> = lshr i32 4, 2   ; yields {i32}:result = 1
  <result> = lshr i8  4, 3   ; yields {i8}:result = 0
  <result> = lshr i8 -2, 1   ; yields {i8}:result = 0x7FFFFFFF 
  <result> = lshr i32 1, 32  ; undefined
  <result> = lshr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 2>   ; yields: result=<2 x i32> < i32 0x7FFFFFFF, i32 1>

Syntax:

  <result> = ashr <ty> <op1>, <op2>         ; yields {ty}:result
  <result> = ashr exact <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'ashr' instruction (arithmetic shift right) returns the first operand shifted to the right a specified number of bits with sign extension.

Arguments:

Both arguments to the 'ashr' instruction must be the same integer or vector of integer type. 'op2' is treated as an unsigned value.

Semantics:

This instruction always performs an arithmetic shift right operation, The most significant bits of the result will be filled with the sign bit of op1. If op2 is (statically or dynamically) equal to or larger than the number of bits in op1, the result is undefined. If the arguments are vectors, each vector element of op1 is shifted by the corresponding shift amount in op2.

If the exact keyword is present, the result value of the ashr is a trap value if any of the bits shifted out are non-zero.

Example:

  <result> = ashr i32 4, 1   ; yields {i32}:result = 2
  <result> = ashr i32 4, 2   ; yields {i32}:result = 1
  <result> = ashr i8  4, 3   ; yields {i8}:result = 0
  <result> = ashr i8 -2, 1   ; yields {i8}:result = -1
  <result> = ashr i32 1, 32  ; undefined
  <result> = ashr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 3>   ; yields: result=<2 x i32> < i32 -1, i32 0>

Syntax:

  <result> = and <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'and' instruction returns the bitwise logical and of its two operands.

Arguments:

The two arguments to the 'and' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The truth table used for the 'and' instruction is:

Example:

  <result> = and i32 4, %var         ; yields {i32}:result = 4 & %var
  <result> = and i32 15, 40          ; yields {i32}:result = 8
  <result> = and i32 4, 8            ; yields {i32}:result = 0

Syntax:

  <result> = or <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'or' instruction returns the bitwise logical inclusive or of its two operands.

Arguments:

The two arguments to the 'or' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The truth table used for the 'or' instruction is:

Example:

  <result> = or i32 4, %var         ; yields {i32}:result = 4 | %var
  <result> = or i32 15, 40          ; yields {i32}:result = 47
  <result> = or i32 4, 8            ; yields {i32}:result = 12

Syntax:

  <result> = xor <ty> <op1>, <op2>   ; yields {ty}:result

Overview:

The 'xor' instruction returns the bitwise logical exclusive or of its two operands. The xor is used to implement the "one's complement" operation, which is the "~" operator in C.

Arguments:

The two arguments to the 'xor' instruction must be integer or vector of integer values. Both arguments must have identical types.

Semantics:

The truth table used for the 'xor' instruction is:

Example:

  <result> = xor i32 4, %var         ; yields {i32}:result = 4 ^ %var
  <result> = xor i32 15, 40          ; yields {i32}:result = 39
  <result> = xor i32 4, 8            ; yields {i32}:result = 12
  <result> = xor i32 %V, -1          ; yields {i32}:result = ~%V

Syntax:

  <result> = extractelement <n x <ty>> <val>, i32 <idx>    ; yields <ty>

Overview:

The 'extractelement' instruction extracts a single scalar element from a vector at a specified index.

Arguments:

The first operand of an 'extractelement' instruction is a value of vector type. The second operand is an index indicating the position from which to extract the element. The index may be a variable.

Semantics:

The result is a scalar of the same type as the element type of val. Its value is the value at position idx of val. If idx exceeds the length of val, the results are undefined.

Example:

  <result> = extractelement <4 x i32> %vec, i32 0    ; yields i32

Syntax:

  <result> = insertelement <n x <ty>> <val>, <ty> <elt>, i32 <idx>    ; yields <n x <ty>>

Overview:

The 'insertelement' instruction inserts a scalar element into a vector at a specified index.

Arguments:

The first operand of an 'insertelement' instruction is a value of vector type. The second operand is a scalar value whose type must equal the element type of the first operand. The third operand is an index indicating the position at which to insert the value. The index may be a variable.

Semantics:

The result is a vector of the same type as val. Its element values are those of val except at position idx, where it gets the value elt. If idx exceeds the length of val, the results are undefined.

Example:

  <result> = insertelement <4 x i32> %vec, i32 1, i32 0    ; yields <4 x i32>

Syntax:

  <result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask>    ; yields <m x <ty>>

Overview:

The 'shufflevector' instruction constructs a permutation of elements from two input vectors, returning a vector with the same element type as the input and length that is the same as the shuffle mask.

Arguments:

The first two operands of a 'shufflevector' instruction are vectors with types that match each other. The third argument is a shuffle mask whose element type is always 'i32'. The result of the instruction is a vector whose length is the same as the shuffle mask and whose element type is the same as the element type of the first two operands.

The shuffle mask operand is required to be a constant vector with either constant integer or undef values.

Semantics:

The elements of the two input vectors are numbered from left to right across both of the vectors. The shuffle mask operand specifies, for each element of the result vector, which element of the two input vectors the result element gets. The element selector may be undef (meaning "don't care") and the second operand may be undef if performing a shuffle from only one vector.

Example:

  <result> = shufflevector <4 x i32> %v1, <4 x i32> %v2,
                          <4 x i32> <i32 0, i32 4, i32 1, i32 5>  ; yields <4 x i32>
  <result> = shufflevector <4 x i32> %v1, <4 x i32> undef,
                          <4 x i32> <i32 0, i32 1, i32 2, i32 3>  ; yields <4 x i32> - Identity shuffle.
  <result> = shufflevector <8 x i32> %v1, <8 x i32> undef,
                          <4 x i32> <i32 0, i32 1, i32 2, i32 3>  ; yields <4 x i32>
  <result> = shufflevector <4 x i32> %v1, <4 x i32> %v2,
                          <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >  ; yields <8 x i32>

Syntax:

  <result> = extractvalue <aggregate type> <val>, <idx>{, <idx>}*

Overview:

The 'extractvalue' instruction extracts the value of a member field from an aggregate value.

Arguments:

The first operand of an 'extractvalue' instruction is a value of struct or array type. The operands are constant indices to specify which value to extract in a similar manner as indices in a 'getelementptr' instruction.

The major differences to getelementptr indexing are:

• Since the value being indexed is not a pointer, the first index is omitted and assumed to be zero.
• At least one index must be specified.
• Not only struct indices but also array indices must be in bounds.

Semantics:

The result is the value at the position in the aggregate specified by the index operands.

Example:

  <result> = extractvalue {i32, float} %agg, 0    ; yields i32

Syntax:

  <result> = insertvalue <aggregate type> <val>, <ty> <elt>, <idx>{, <idx>}*    ; yields <aggregate type>

Overview:

The 'insertvalue' instruction inserts a value into a member field in an aggregate value.

Arguments:

The first operand of an 'insertvalue' instruction is a value of struct or array type. The second operand is a first-class value to insert. The following operands are constant indices indicating the position at which to insert the value in a similar manner as indices in a 'extractvalue' instruction. The value to insert must have the same type as the value identified by the indices.

Semantics:

The result is an aggregate of the same type as val. Its value is that of val except that the value at the position specified by the indices is that of elt.

Example:

  %agg1 = insertvalue {i32, float} undef, i32 1, 0              ; yields {i32 1, float undef}
  %agg2 = insertvalue {i32, float} %agg1, float %val, 1         ; yields {i32 1, float %val}
  %agg3 = insertvalue {i32, {float}} %agg1, float %val, 1, 0    ; yields {i32 1, float %val}

Syntax:

  <result> = alloca <type>[, <ty> <NumElements>][, align <alignment>]     ; yields {type*}:result

Overview:

The 'alloca' instruction allocates memory on the stack frame of the currently executing function, to be automatically released when this function returns to its caller. The object is always allocated in the generic address space (address space zero).

Arguments:

The 'alloca' instruction allocates sizeof(<type>)*NumElements bytes of memory on the runtime stack, returning a pointer of the appropriate type to the program. If "NumElements" is specified, it is the number of elements allocated, otherwise "NumElements" is defaulted to be one. If a constant alignment is specified, the value result of the allocation is guaranteed to be aligned to at least that boundary. If not specified, or if zero, the target can choose to align the allocation on any convenient boundary compatible with the type.

'type' may be any sized type.

Semantics:

Memory is allocated; a pointer is returned. The operation is undefined if there is insufficient stack space for the allocation. 'alloca'd memory is automatically released when the function returns. The 'alloca' instruction is commonly used to represent automatic variables that must have an address available. When the function returns (either with the ret or unwind instructions), the memory is reclaimed. Allocating zero bytes is legal, but the result is undefined.

Example:

  %ptr = alloca i32                             ; yields {i32*}:ptr
  %ptr = alloca i32, i32 4                      ; yields {i32*}:ptr
  %ptr = alloca i32, i32 4, align 1024          ; yields {i32*}:ptr
  %ptr = alloca i32, align 1024                 ; yields {i32*}:ptr

Syntax:

  <result> = load [volatile] <ty>* <pointer>[, align <alignment>][, !nontemporal !<index>]
  <result> = load atomic [volatile] <ty>* <pointer> [singlethread] <ordering>, align <alignment>
  !<index> = !{ i32 1 }

Overview:

The 'load' instruction is used to read from memory.

Arguments:

The argument to the 'load' instruction specifies the memory address from which to load. The pointer must point to a first class type. If the load is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this load with other volatile operations.

If the load is marked as atomic, it takes an extra ordering and optional singlethread argument. The release and acq_rel orderings are not valid on load instructions. Atomic loads produce defined results when they may see multiple atomic stores. The type of the pointee must be an integer type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. align must be explicitly specified on atomic loads, and the load has undefined behavior if the alignment is not set to a value which is at least the size in bytes of the pointee. !nontemporal does not have any defined semantics for atomic loads.

The optional constant align argument specifies the alignment of the operation (that is, the alignment of the memory address). A value of 0 or an omitted align argument means that the operation has the preferential alignment for the target. It is the responsibility of the code emitter to ensure that the alignment information is correct. Overestimating the alignment results in undefined behavior. Underestimating the alignment may produce less efficient code. An alignment of 1 is always safe.

The optional !nontemporal metadata must reference a single metatadata name <index> corresponding to a metadata node with one i32 entry of value 1. The existence of the !nontemporal metatadata on the instruction tells the optimizer and code generator that this load is not expected to be reused in the cache. The code generator may select special instructions to save cache bandwidth, such as the MOVNT instruction on x86.

Semantics:

The location of memory pointed to is loaded. If the value being loaded is of scalar type then the number of bytes read does not exceed the minimum number of bytes needed to hold all bits of the type. For example, loading an i24 reads at most three bytes. When loading a value of a type like i20 with a size that is not an integral number of bytes, the result is undefined if the value was not originally written using a store of the same type.

Examples:

  %ptr = alloca i32                               ; yields {i32*}:ptr
  store i32 3, i32* %ptr                          ; yields {void}
  %val = load i32* %ptr                           ; yields {i32}:val = i32 3

Syntax:

  store [volatile] <ty> <value>, <ty>* <pointer>[, align <alignment>][, !nontemporal !<index>]                   ; yields {void}
  store atomic [volatile] <ty> <value>, <ty>* <pointer> [singlethread] <ordering>, align <alignment>             ; yields {void}

Overview:

The 'store' instruction is used to write to memory.

Arguments:

There are two arguments to the 'store' instruction: a value to store and an address at which to store it. The type of the '<pointer>' operand must be a pointer to the first class type of the '<value>' operand. If the store is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this store with other volatile operations.

If the store is marked as atomic, it takes an extra ordering and optional singlethread argument. The acquire and acq_rel orderings aren't valid on store instructions. Atomic loads produce defined results when they may see multiple atomic stores. The type of the pointee must be an integer type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. align must be explicitly specified on atomic stores, and the store has undefined behavior if the alignment is not set to a value which is at least the size in bytes of the pointee. !nontemporal does not have any defined semantics for atomic stores.

The optional constant "align" argument specifies the alignment of the operation (that is, the alignment of the memory address). A value of 0 or an omitted "align" argument means that the operation has the preferential alignment for the target. It is the responsibility of the code emitter to ensure that the alignment information is correct. Overestimating the alignment results in an undefined behavior. Underestimating the alignment may produce less efficient code. An alignment of 1 is always safe.

The optional !nontemporal metadata must reference a single metatadata name <index> corresponding to a metadata node with one i32 entry of value 1. The existence of the !nontemporal metatadata on the instruction tells the optimizer and code generator that this load is not expected to be reused in the cache. The code generator may select special instructions to save cache bandwidth, such as the MOVNT instruction on x86.

Semantics:

The contents of memory are updated to contain '<value>' at the location specified by the '<pointer>' operand. If '<value>' is of scalar type then the number of bytes written does not exceed the minimum number of bytes needed to hold all bits of the type. For example, storing an i24 writes at most three bytes. When writing a value of a type like i20 with a size that is not an integral number of bytes, it is unspecified what happens to the extra bits that do not belong to the type, but they will typically be overwritten.

Example:

  %ptr = alloca i32                               ; yields {i32*}:ptr
  store i32 3, i32* %ptr                          ; yields {void}
  %val = load i32* %ptr                           ; yields {i32}:val = i32 3

Syntax:

  fence [singlethread] <ordering>                   ; yields {void}

Overview:

The 'fence' instruction is used to introduce happens-before edges between operations.

Arguments:

'fence' instructions take an ordering argument which defines what synchronizes-with edges they add. They can only be given acquire, release, acq_rel, and seq_cst orderings.

Semantics:

A fence A which has (at least) release ordering semantics synchronizes with a fence B with (at least) acquire ordering semantics if and only if there exist atomic operations X and Y, both operating on some atomic object M, such that A is sequenced before X, X modifies M (either directly or through some side effect of a sequence headed by X), Y is sequenced before B, and Y observes M. This provides a happens-before dependency between A and B. Rather than an explicit fence, one (but not both) of the atomic operations X or Y might provide a release or acquire (resp.) ordering constraint and still synchronize-with the explicit fence and establish the happens-before edge.

A fence which has seq_cst ordering, in addition to having both acquire and release semantics specified above, participates in the global program order of other seq_cst operations and/or fences.

The optional "singlethread" argument specifies that the fence only synchronizes with other fences in the same thread. (This is useful for interacting with signal handlers.)

Example:

  fence acquire                          ; yields {void}
  fence singlethread seq_cst             ; yields {void}

Syntax:

  cmpxchg [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [singlethread] <ordering>                   ; yields {ty}

Overview:

The 'cmpxchg' instruction is used to atomically modify memory. It loads a value in memory and compares it to a given value. If they are equal, it stores a new value into the memory.

Arguments:

There are three arguments to the 'cmpxchg' instruction: an address to operate on, a value to compare to the value currently be at that address, and a new value to place at that address if the compared values are equal. The type of '<cmp>' must be an integer type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. '<cmp>' and '<new>' must have the same type, and the type of '<pointer>' must be a pointer to that type. If the cmpxchg is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this cmpxchg with other volatile operations.

The ordering argument specifies how this cmpxchg synchronizes with other atomic operations.

The optional "singlethread" argument declares that the cmpxchg is only atomic with respect to code (usually signal handlers) running in the same thread as the cmpxchg. Otherwise the cmpxchg is atomic with respect to all other code in the system.

The pointer passed into cmpxchg must have alignment greater than or equal to the size in memory of the operand.

Semantics:

The contents of memory at the location specified by the '<pointer>' operand is read and compared to '<cmp>'; if the read value is the equal, '<new>' is written. The original value at the location is returned.

A successful cmpxchg is a read-modify-write instruction for the purpose of identifying release sequences. A failed cmpxchg is equivalent to an atomic load with an ordering parameter determined by dropping any release part of the cmpxchg's ordering.

Example:

entry:
  %orig = atomic load i32* %ptr unordered                       ; yields {i32}
  br label %loop

loop:
  %cmp = phi i32 [ %orig, %entry ], [%old, %loop]
  %squared = mul i32 %cmp, %cmp
  %old = cmpxchg i32* %ptr, i32 %cmp, i32 %squared                       ; yields {i32}
  %success = icmp eq i32 %cmp, %old
  br i1 %success, label %done, label %loop

done:
  ...

Syntax:

  atomicrmw [volatile] <operation> <ty>* <pointer>, <ty> <value> [singlethread] <ordering>                   ; yields {ty}

Overview:

The 'atomicrmw' instruction is used to atomically modify memory.

Arguments:

There are three arguments to the 'atomicrmw' instruction: an operation to apply, an address whose value to modify, an argument to the operation. The operation must be one of the following keywords:

• xchg
• add
• sub
• and
• nand
• or
• xor
• max
• min
• umax
• umin

The type of '<value>' must be an integer type whose bit width is a power of two greater than or equal to eight and less than or equal to a target-specific size limit. The type of the '<pointer>' operand must be a pointer to that type. If the atomicrmw is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this atomicrmw with other volatile operations.

Semantics:

The contents of memory at the location specified by the '<pointer>' operand are atomically read, modified, and written back. The original value at the location is returned. The modification is specified by the operation argument:

• xchg: *ptr = val
• add: *ptr = *ptr + val
• sub: *ptr = *ptr - val
• and: *ptr = *ptr & val
• nand: *ptr = ~(*ptr & val)
• or: *ptr = *ptr | val
• xor: *ptr = *ptr ^ val
• max: *ptr = *ptr > val ? *ptr : val (using a signed comparison)
• min: *ptr = *ptr < val ? *ptr : val (using a signed comparison)
• umax: *ptr = *ptr > val ? *ptr : val (using an unsigned comparison)
• umin: *ptr = *ptr < val ? *ptr : val (using an unsigned comparison)

Example:

  %old = atomicrmw add i32* %ptr, i32 1 acquire                        ; yields {i32}

Syntax:

  <result> = getelementptr <pty>* <ptrval>{, <ty> <idx>}*
  <result> = getelementptr inbounds <pty>* <ptrval>{, <ty> <idx>}*

Overview:

The 'getelementptr' instruction is used to get the address of a subelement of an aggregate data structure. It performs address calculation only and does not access memory.

Arguments:

The first argument is always a pointer, and forms the basis of the calculation. The remaining arguments are indices that indicate which of the elements of the aggregate object are indexed. The interpretation of each index is dependent on the type being indexed into. The first index always indexes the pointer value given as the first argument, the second index indexes a value of the type pointed to (not necessarily the value directly pointed to, since the first index can be non-zero), etc. The first type indexed into must be a pointer value, subsequent types can be arrays, vectors, and structs. Note that subsequent types being indexed into can never be pointers, since that would require loading the pointer before continuing calculation.

The type of each index argument depends on the type it is indexing into. When indexing into a (optionally packed) structure, only i32 integer constants are allowed. When indexing into an array, pointer or vector, integers of any width are allowed, and they are not required to be constant. These integers are treated as signed values where relevant.

For example, let's consider a C code fragment and how it gets compiled to LLVM:

struct RT {
  char A;
  int B[10][20];
  char C;
};
struct ST {
  int X;
  double Y;
  struct RT Z;
};

int *foo(struct ST *s) {
  return &s[1].Z.B[5][13];
}

The LLVM code generated by the GCC frontend is:

%RT = type { i8 , [10 x [20 x i32]], i8  }
%ST = type { i32, double, %RT }

define i32* @foo(%ST* %s) {
entry:
  %reg = getelementptr %ST* %s, i32 1, i32 2, i32 1, i32 5, i32 13
  ret i32* %reg
}

Semantics:

In the example above, the first index is indexing into the '%ST*' type, which is a pointer, yielding a '%ST' = '{ i32, double, %RT }' type, a structure. The second index indexes into the third element of the structure, yielding a '%RT' = '{ i8 , [10 x [20 x i32]], i8 }' type, another structure. The third index indexes into the second element of the structure, yielding a '[10 x [20 x i32]]' type, an array. The two dimensions of the array are subscripted into, yielding an 'i32' type. The 'getelementptr' instruction returns a pointer to this element, thus computing a value of 'i32*' type.

Note that it is perfectly legal to index partially through a structure, returning a pointer to an inner element. Because of this, the LLVM code for the given testcase is equivalent to:

  define i32* @foo(%ST* %s) {
    %t1 = getelementptr %ST* %s, i32 1                        ; yields %ST*:%t1
    %t2 = getelementptr %ST* %t1, i32 0, i32 2                ; yields %RT*:%t2
    %t3 = getelementptr %RT* %t2, i32 0, i32 1                ; yields [10 x [20 x i32]]*:%t3
    %t4 = getelementptr [10 x [20 x i32]]* %t3, i32 0, i32 5  ; yields [20 x i32]*:%t4
    %t5 = getelementptr [20 x i32]* %t4, i32 0, i32 13        ; yields i32*:%t5
    ret i32* %t5
  }

If the inbounds keyword is present, the result value of the getelementptr is a trap value if the base pointer is not an in bounds address of an allocated object, or if any of the addresses that would be formed by successive addition of the offsets implied by the indices to the base address with infinitely precise signed arithmetic are not an in bounds address of that allocated object. The in bounds addresses for an allocated object are all the addresses that point into the object, plus the address one byte past the end.

If the inbounds keyword is not present, the offsets are added to the base address with silently-wrapping two's complement arithmetic. If the offsets have a different width from the pointer, they are sign-extended or truncated to the width of the pointer. The result value of the getelementptr may be outside the object pointed to by the base pointer. The result value may not necessarily be used to access memory though, even if it happens to point into allocated storage. See the Pointer Aliasing Rules section for more information.

The getelementptr instruction is often confusing. For some more insight into how it works, see the getelementptr FAQ.

Example:

    ; yields [12 x i8]*:aptr
    %aptr = getelementptr {i32, [12 x i8]}* %saptr, i64 0, i32 1
    ; yields i8*:vptr
    %vptr = getelementptr {i32, <2 x i8>}* %svptr, i64 0, i32 1, i32 1
    ; yields i8*:eptr
    %eptr = getelementptr [12 x i8]* %aptr, i64 0, i32 1
    ; yields i32*:iptr
    %iptr = getelementptr [10 x i32]* @arr, i16 0, i16 0

Syntax:

  <result> = trunc <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'trunc' instruction truncates its operand to the type ty2.

Arguments:

The 'trunc' instruction takes a value to trunc, and a type to trunc it to. Both types must be of integer types, or vectors of the same number of integers. The bit size of the value must be larger than the bit size of the destination type, ty2. Equal sized types are not allowed.

Semantics:

The 'trunc' instruction truncates the high order bits in value and converts the remaining bits to ty2. Since the source size must be larger than the destination size, trunc cannot be a no-op cast. It will always truncate bits.

Example:

  %X = trunc i32 257 to i8                        ; yields i8:1
  %Y = trunc i32 123 to i1                        ; yields i1:true
  %Z = trunc i32 122 to i1                        ; yields i1:false
  %W = trunc <2 x i16> <i16 8, i16 7> to <2 x i8> ; yields <i8 8, i8 7>

Syntax:

  <result> = zext <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'zext' instruction zero extends its operand to type ty2.

Arguments:

The 'zext' instruction takes a value to cast, and a type to cast it to. Both types must be of integer types, or vectors of the same number of integers. The bit size of the value must be smaller than the bit size of the destination type, ty2.

Semantics:

The zext fills the high order bits of the value with zero bits until it reaches the size of the destination type, ty2.

When zero extending from i1, the result will always be either 0 or 1.

Example:

  %X = zext i32 257 to i64              ; yields i64:257
  %Y = zext i1 true to i32              ; yields i32:1
  %Z = zext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>

Syntax:

  <result> = sext <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'sext' sign extends value to the type ty2.

Arguments:

The 'sext' instruction takes a value to cast, and a type to cast it to. Both types must be of integer types, or vectors of the same number of integers. The bit size of the value must be smaller than the bit size of the destination type, ty2.

Semantics:

The 'sext' instruction performs a sign extension by copying the sign bit (highest order bit) of the value until it reaches the bit size of the type ty2.

When sign extending from i1, the extension always results in -1 or 0.

Example:

  %X = sext i8  -1 to i16              ; yields i16   :65535
  %Y = sext i1 true to i32             ; yields i32:-1
  %Z = sext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>

Syntax:

  <result> = fptrunc <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'fptrunc' instruction truncates value to type ty2.

Arguments:

The 'fptrunc' instruction takes a floating point value to cast and a floating point type to cast it to. The size of value must be larger than the size of ty2. This implies that fptrunc cannot be used to make a no-op cast.

Semantics:

The 'fptrunc' instruction truncates a value from a larger floating point type to a smaller floating point type. If the value cannot fit within the destination type, ty2, then the results are undefined.

Example:

  %X = fptrunc double 123.0 to float         ; yields float:123.0
  %Y = fptrunc double 1.0E+300 to float      ; yields undefined

Syntax:

  <result> = fpext <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'fpext' extends a floating point value to a larger floating point value.

Arguments:

The 'fpext' instruction takes a floating point value to cast, and a floating point type to cast it to. The source type must be smaller than the destination type.

Semantics:

The 'fpext' instruction extends the value from a smaller floating point type to a larger floating point type. The fpext cannot be used to make a no-op cast because it always changes bits. Use bitcast to make a no-op cast for a floating point cast.

Example:

  %X = fpext float 3.125 to double         ; yields double:3.125000e+00
  %Y = fpext double %X to fp128            ; yields fp128:0xL00000000000000004000900000000000

Syntax:

  <result> = fptoui <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'fptoui' converts a floating point value to its unsigned integer equivalent of type ty2.

Arguments:

The 'fptoui' instruction takes a value to cast, which must be a scalar or vector floating point value, and a type to cast it to ty2, which must be an integer type. If ty is a vector floating point type, ty2 must be a vector integer type with the same number of elements as ty

Semantics:

The 'fptoui' instruction converts its floating point operand into the nearest (rounding towards zero) unsigned integer value. If the value cannot fit in ty2, the results are undefined.

Example:

  %X = fptoui double 123.0 to i32      ; yields i32:123
  %Y = fptoui float 1.0E+300 to i1     ; yields undefined:1
  %Z = fptoui float 1.04E+17 to i8     ; yields undefined:1

Syntax:

  <result> = fptosi <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'fptosi' instruction converts floating point value to type ty2.

Arguments:

The 'fptosi' instruction takes a value to cast, which must be a scalar or vector floating point value, and a type to cast it to ty2, which must be an integer type. If ty is a vector floating point type, ty2 must be a vector integer type with the same number of elements as ty

Semantics:

The 'fptosi' instruction converts its floating point operand into the nearest (rounding towards zero) signed integer value. If the value cannot fit in ty2, the results are undefined.

Example:

  %X = fptosi double -123.0 to i32      ; yields i32:-123
  %Y = fptosi float 1.0E-247 to i1      ; yields undefined:1
  %Z = fptosi float 1.04E+17 to i8      ; yields undefined:1

Syntax:

  <result> = uitofp <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'uitofp' instruction regards value as an unsigned integer and converts that value to the ty2 type.

Arguments:

The 'uitofp' instruction takes a value to cast, which must be a scalar or vector integer value, and a type to cast it to ty2, which must be an floating point type. If ty is a vector integer type, ty2 must be a vector floating point type with the same number of elements as ty

Semantics:

The 'uitofp' instruction interprets its operand as an unsigned integer quantity and converts it to the corresponding floating point value. If the value cannot fit in the floating point value, the results are undefined.

Example:

  %X = uitofp i32 257 to float         ; yields float:257.0
  %Y = uitofp i8 -1 to double          ; yields double:255.0

Syntax:

  <result> = sitofp <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'sitofp' instruction regards value as a signed integer and converts that value to the ty2 type.

Arguments:

The 'sitofp' instruction takes a value to cast, which must be a scalar or vector integer value, and a type to cast it to ty2, which must be an floating point type. If ty is a vector integer type, ty2 must be a vector floating point type with the same number of elements as ty

Semantics:

The 'sitofp' instruction interprets its operand as a signed integer quantity and converts it to the corresponding floating point value. If the value cannot fit in the floating point value, the results are undefined.

Example:

  %X = sitofp i32 257 to float         ; yields float:257.0
  %Y = sitofp i8 -1 to double          ; yields double:-1.0

Syntax:

  <result> = ptrtoint <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'ptrtoint' instruction converts the pointer value to the integer type ty2.

Arguments:

The 'ptrtoint' instruction takes a value to cast, which must be a pointer value, and a type to cast it to ty2, which must be an integer type.

Semantics:

The 'ptrtoint' instruction converts value to integer type ty2 by interpreting the pointer value as an integer and either truncating or zero extending that value to the size of the integer type. If value is smaller than ty2 then a zero extension is done. If value is larger than ty2 then a truncation is done. If they are the same size, then nothing is done (no-op cast) other than a type change.

Example:

  %X = ptrtoint i32* %X to i8           ; yields truncation on 32-bit architecture
  %Y = ptrtoint i32* %x to i64          ; yields zero extension on 32-bit architecture

Syntax:

  <result> = inttoptr <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'inttoptr' instruction converts an integer value to a pointer type, ty2.

Arguments:

The 'inttoptr' instruction takes an integer value to cast, and a type to cast it to, which must be a pointer type.

Semantics:

The 'inttoptr' instruction converts value to type ty2 by applying either a zero extension or a truncation depending on the size of the integer value. If value is larger than the size of a pointer then a truncation is done. If value is smaller than the size of a pointer then a zero extension is done. If they are the same size, nothing is done (no-op cast).

Example:

  %X = inttoptr i32 255 to i32*          ; yields zero extension on 64-bit architecture
  %Y = inttoptr i32 255 to i32*          ; yields no-op on 32-bit architecture
  %Z = inttoptr i64 0 to i32*            ; yields truncation on 32-bit architecture

Syntax:

  <result> = bitcast <ty> <value> to <ty2>             ; yields ty2

Overview:

The 'bitcast' instruction converts value to type ty2 without changing any bits.

Arguments:

The 'bitcast' instruction takes a value to cast, which must be a non-aggregate first class value, and a type to cast it to, which must also be a non-aggregate first class type. The bit sizes of value and the destination type, ty2, must be identical. If the source type is a pointer, the destination type must also be a pointer. This instruction supports bitwise conversion of vectors to integers and to vectors of other types (as long as they have the same size).

Semantics:

The 'bitcast' instruction converts value to type ty2. It is always a no-op cast because no bits change with this conversion. The conversion is done as if the value had been stored to memory and read back as type ty2. Pointer types may only be converted to other pointer types with this instruction. To convert pointers to other types, use the inttoptr or ptrtoint instructions first.

Example:

  %X = bitcast i8 255 to i8              ; yields i8 :-1
  %Y = bitcast i32* %x to sint*          ; yields sint*:%x
  %Z = bitcast <2 x int> %V to i64;      ; yields i64: %V

Syntax:

  <result> = icmp <cond> <ty> <op1>, <op2>   ; yields {i1} or {<N x i1>}:result

Overview:

The 'icmp' instruction returns a boolean value or a vector of boolean values based on comparison of its two integer, integer vector, or pointer operands.

Arguments:

The 'icmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not a value, just a keyword. The possible condition code are:

1. eq: equal
2. ne: not equal
3. ugt: unsigned greater than
4. uge: unsigned greater or equal
5. ult: unsigned less than
6. ule: unsigned less or equal
7. sgt: signed greater than
8. sge: signed greater or equal
9. slt: signed less than
10. sle: signed less or equal

The remaining two arguments must be integer or pointer or integer vector typed. They must also be identical types.

Semantics:

The 'icmp' compares op1 and op2 according to the condition code given as cond. The comparison performed always yields either an i1 or vector of i1 result, as follows:

1. eq: yields true if the operands are equal, false otherwise. No sign interpretation is necessary or performed.
2. ne: yields true if the operands are unequal, false otherwise. No sign interpretation is necessary or performed.
3. ugt: interprets the operands as unsigned values and yields true if op1 is greater than op2.
4. uge: interprets the operands as unsigned values and yields true if op1 is greater than or equal to op2.
5. ult: interprets the operands as unsigned values and yields true if op1 is less than op2.
6. ule: interprets the operands as unsigned values and yields true if op1 is less than or equal to op2.
7. sgt: interprets the operands as signed values and yields true if op1 is greater than op2.
8. sge: interprets the operands as signed values and yields true if op1 is greater than or equal to op2.
9. slt: interprets the operands as signed values and yields true if op1 is less than op2.
10. sle: interprets the operands as signed values and yields true if op1 is less than or equal to op2.

If the operands are pointer typed, the pointer values are compared as if they were integers.

If the operands are integer vectors, then they are compared element by element. The result is an i1 vector with the same number of elements as the values being compared. Otherwise, the result is an i1.

Example:

  <result> = icmp eq i32 4, 5          ; yields: result=false
  <result> = icmp ne float* %X, %X     ; yields: result=false
  <result> = icmp ult i16  4, 5        ; yields: result=true
  <result> = icmp sgt i16  4, 5        ; yields: result=false
  <result> = icmp ule i16 -4, 5        ; yields: result=false
  <result> = icmp sge i16  4, 5        ; yields: result=false

Note that the code generator does not yet support vector types with the icmp instruction.

Syntax:

  <result> = fcmp <cond> <ty> <op1>, <op2>     ; yields {i1} or {<N x i1>}:result

Overview:

The 'fcmp' instruction returns a boolean value or vector of boolean values based on comparison of its operands.

If the operands are floating point scalars, then the result type is a boolean (i1).

If the operands are floating point vectors, then the result type is a vector of boolean with the same number of elements as the operands being compared.

Arguments:

The 'fcmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not a value, just a keyword. The possible condition code are:

1. false: no comparison, always returns false
2. oeq: ordered and equal
3. ogt: ordered and greater than
4. oge: ordered and greater than or equal
5. olt: ordered and less than
6. ole: ordered and less than or equal
7. one: ordered and not equal
8. ord: ordered (no nans)
9. ueq: unordered or equal
10. ugt: unordered or greater than
11. uge: unordered or greater than or equal
12. ult: unordered or less than
13. ule: unordered or less than or equal
14. une: unordered or not equal
15. uno: unordered (either nans)
16. true: no comparison, always returns true

Ordered means that neither operand is a QNAN while unordered means that either operand may be a QNAN.

Each of val1 and val2 arguments must be either a floating point type or a vector of floating point type. They must have identical types.

Semantics:

The 'fcmp' instruction compares op1 and op2 according to the condition code given as cond. If the operands are vectors, then the vectors are compared element by element. Each comparison performed always yields an i1 result, as follows:

1. false: always yields false, regardless of operands.
2. oeq: yields true if both operands are not a QNAN and op1 is equal to op2.
3. ogt: yields true if both operands are not a QNAN and op1 is greater than op2.
4. oge: yields true if both operands are not a QNAN and op1 is greater than or equal to op2.
5. olt: yields true if both operands are not a QNAN and op1 is less than op2.
6. ole: yields true if both operands are not a QNAN and op1 is less than or equal to op2.
7. one: yields true if both operands are not a QNAN and op1 is not equal to op2.
8. ord: yields true if both operands are not a QNAN.
9. ueq: yields true if either operand is a QNAN or op1 is equal to op2.
10. ugt: yields true if either operand is a QNAN or op1 is greater than op2.
11. uge: yields true if either operand is a QNAN or op1 is greater than or equal to op2.
12. ult: yields true if either operand is a QNAN or op1 is less than op2.
13. ule: yields true if either operand is a QNAN or op1 is less than or equal to op2.
14. une: yields true if either operand is a QNAN or op1 is not equal to op2.
15. uno: yields true if either operand is a QNAN.
16. true: always yields true, regardless of operands.

Example:

  <result> = fcmp oeq float 4.0, 5.0    ; yields: result=false
  <result> = fcmp one float 4.0, 5.0    ; yields: result=true
  <result> = fcmp olt float 4.0, 5.0    ; yields: result=true
  <result> = fcmp ueq double 1.0, 2.0   ; yields: result=false

Note that the code generator does not yet support vector types with the fcmp instruction.

Syntax:

  <result> = phi <ty> [ <val0>, <label0>], ...

Overview:

The 'phi' instruction is used to implement the φ node in the SSA graph representing the function.

Arguments:

The type of the incoming values is specified with the first type field. After this, the 'phi' instruction takes a list of pairs as arguments, with one pair for each predecessor basic block of the current block. Only values of first class type may be used as the value arguments to the PHI node. Only labels may be used as the label arguments.

There must be no non-phi instructions between the start of a basic block and the PHI instructions: i.e. PHI instructions must be first in a basic block.

For the purposes of the SSA form, the use of each incoming value is deemed to occur on the edge from the corresponding predecessor block to the current block (but after any definition of an 'invoke' instruction's return value on the same edge).

Semantics:

At runtime, the 'phi' instruction logically takes on the value specified by the pair corresponding to the predecessor basic block that executed just prior to the current block.

Example:

Loop:       ; Infinite loop that counts from 0 on up...
  %indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ]
  %nextindvar = add i32 %indvar, 1
  br label %Loop

Syntax:

  <result> = select selty <cond>, <ty> <val1>, <ty> <val2>             ; yields ty

  selty is either i1 or {<N x i1>}

Overview:

The 'select' instruction is used to choose one value based on a condition, without branching.

Arguments:

The 'select' instruction requires an 'i1' value or a vector of 'i1' values indicating the condition, and two values of the same first class type. If the val1/val2 are vectors and the condition is a scalar, then entire vectors are selected, not individual elements.

Semantics:

If the condition is an i1 and it evaluates to 1, the instruction returns the first value argument; otherwise, it returns the second value argument.

If the condition is a vector of i1, then the value arguments must be vectors of the same size, and the selection is done element by element.

Example:

  %X = select i1 true, i8 17, i8 42          ; yields i8:17

Note that the code generator does not yet support conditions with vector type.

Syntax:

  <result> = [tail] call [cconv] [ret attrs] <ty> [<fnty>*] <fnptrval>(<function args>) [fn attrs]

Overview:

The 'call' instruction represents a simple function call.

Arguments:

This instruction requires several arguments:

1. The optional "tail" marker indicates that the callee function does not access any allocas or varargs in the caller. Note that calls may be marked "tail" even if they do not occur before a ret instruction. If the "tail" marker is present, the function call is eligible for tail call optimization, but might not in fact be optimized into a jump. The code generator may optimize calls marked "tail" with either 1) automatic sibling call optimization when the caller and callee have matching signatures, or 2) forced tail call optimization when the following extra requirements are met:
   • Caller and callee both have the calling convention fastcc.
   • The call is in tail position (ret immediately follows call and ret uses value of call or is void).
   • Option -tailcallopt is enabled, or llvm::GuaranteedTailCallOpt is true.
   • Platform specific constraints are met.
2. The optional "cconv" marker indicates which calling convention the call should use. If none is specified, the call defaults to using C calling conventions. The calling convention of the call must match the calling convention of the target function, or else the behavior is undefined.
3. The optional Parameter Attributes list for return values. Only 'zeroext', 'signext', and 'inreg' attributes are valid here.
4. 'ty': the type of the call instruction itself which is also the type of the return value. Functions that return no value are marked void.
5. 'fnty': shall be the signature of the pointer to function value being invoked. The argument types must match the types implied by this signature. This type can be omitted if the function is not varargs and if the function type does not return a pointer to a function.
6. 'fnptrval': An LLVM value containing a pointer to a function to be invoked. In most cases, this is a direct function invocation, but indirect calls are just as possible, calling an arbitrary pointer to function value.
7. 'function args': argument list whose types match the function signature argument types and parameter attributes. All arguments must be of first class type. If the function signature indicates the function accepts a variable number of arguments, the extra arguments can be specified.
8. The optional function attributes list. Only 'noreturn', 'nounwind', 'readonly' and 'readnone' attributes are valid here.

Semantics:

The 'call' instruction is used to cause control flow to transfer to a specified function, with its incoming arguments bound to the specified values. Upon a 'ret' instruction in the called function, control flow continues with the instruction after the function call, and the return value of the function is bound to the result argument.

Example:

  %retval = call i32 @test(i32 %argc)
  call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)        ; yields i32
  %X = tail call i32 @foo()                                    ; yields i32
  %Y = tail call fastcc i32 @foo()  ; yields i32
  call void %foo(i8 97 signext)

  %struct.A = type { i32, i8 }
  %r = call %struct.A @foo()                        ; yields { 32, i8 }
  %gr = extractvalue %struct.A %r, 0                ; yields i32
  %gr1 = extractvalue %struct.A %r, 1               ; yields i8
  %Z = call void @foo() noreturn                    ; indicates that %foo never returns normally
  %ZZ = call zeroext i32 @bar()                     ; Return value is %zero extended

llvm treats calls to some functions with names and arguments that match the standard C99 library as being the C99 library functions, and may perform optimizations or generate code for them under that assumption. This is something we'd like to change in the future to provide better support for freestanding environments and non-C-based languages.

Syntax:

  <resultval> = va_arg <va_list*> <arglist>, <argty>

Overview:

The 'va_arg' instruction is used to access arguments passed through the "variable argument" area of a function call. It is used to implement the va_arg macro in C.

Arguments:

This instruction takes a va_list* value and the type of the argument. It returns a value of the specified argument type and increments the va_list to point to the next argument. The actual type of va_list is target specific.

Semantics:

The 'va_arg' instruction loads an argument of the specified type from the specified va_list and causes the va_list to point to the next argument. For more information, see the variable argument handling Intrinsic Functions.

It is legal for this instruction to be called in a function which does not take a variable number of arguments, for example, the vfprintf function.

va_arg is an LLVM instruction instead of an intrinsic function because it takes a type as an argument.

Example:

See the variable argument processing section.

Note that the code generator does not yet fully support va_arg on many targets. Also, it does not currently support va_arg with aggregate types on any target.

Syntax:

  <resultval> = landingpad <somety> personality <type> <pers_fn> <clause>+
  <resultval> = landingpad <somety> personality <type> <pers_fn> cleanup <clause>*

  <clause> := catch <type> <value>
  <clause> := filter <array constant type> <array constant>

Overview:

The 'landingpad' instruction is used by LLVM's exception handling system to specify that a basic block is a landing pad — one where the exception lands, and corresponds to the code found in the catch portion of a try/catch sequence. It defines values supplied by the personality function (pers_fn) upon re-entry to the function. The resultval has the type somety.

Arguments:

This instruction takes a pers_fn value. This is the personality function associated with the unwinding mechanism. The optional cleanup flag indicates that the landing pad block is a cleanup.

A clause begins with the clause type — catch or filter — and contains the global variable representing the "type" that may be caught or filtered respectively. Unlike the catch clause, the filter clause takes an array constant as its argument. Use "[0 x i8**] undef" for a filter which cannot throw. The 'landingpad' instruction must contain at least one clause or the cleanup flag.

Semantics:

The 'landingpad' instruction defines the values which are set by the personality function (pers_fn) upon re-entry to the function, and therefore the "result type" of the landingpad instruction. As with calling conventions, how the personality function results are represented in LLVM IR is target specific.

The clauses are applied in order from top to bottom. If two landingpad instructions are merged together through inlining, the clauses from the calling function are appended to the list of clauses.

The landingpad instruction has several restrictions:

• A landing pad block is a basic block which is the unwind destination of an 'invoke' instruction.
• A landing pad block must have a 'landingpad' instruction as its first non-PHI instruction.
• There can be only one 'landingpad' instruction within the landing pad block.
• A basic block that is not a landing pad block may not include a 'landingpad' instruction.
• All 'landingpad' instructions in a function must have the same personality function.

Example:

  ;; A landing pad which can catch an integer.
  %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
           catch i8** @_ZTIi
  ;; A landing pad that is a cleanup.
  %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
           cleanup
  ;; A landing pad which can catch an integer and can only throw a double.
  %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
           catch i8** @_ZTIi
           filter [1 x i8**] [@_ZTId]

Syntax:

  declare void %llvm.va_start(i8* <arglist>)

Overview:

The 'llvm.va_start' intrinsic initializes *<arglist> for subsequent use by va_arg.

Arguments:

The argument is a pointer to a va_list element to initialize.

Semantics:

The 'llvm.va_start' intrinsic works just like the va_start macro available in C. In a target-dependent way, it initializes the va_list element to which the argument points, so that the next call to va_arg will produce the first variable argument passed to the function. Unlike the C va_start macro, this intrinsic does not need to know the last argument of the function as the compiler can figure that out.

Syntax:

  declare void @llvm.va_end(i8* <arglist>)

Overview:

The 'llvm.va_end' intrinsic destroys *<arglist>, which has been initialized previously with llvm.va_start or llvm.va_copy.

Arguments:

The argument is a pointer to a va_list to destroy.

Semantics:

The 'llvm.va_end' intrinsic works just like the va_end macro available in C. In a target-dependent way, it destroys the va_list element to which the argument points. Calls to llvm.va_start and llvm.va_copy must be matched exactly with calls to llvm.va_end.

Syntax:

  declare void @llvm.va_copy(i8* <destarglist>, i8* <srcarglist>)

Overview:

The 'llvm.va_copy' intrinsic copies the current argument position from the source argument list to the destination argument list.

Arguments:

The first argument is a pointer to a va_list element to initialize. The second argument is a pointer to a va_list element to copy from.

Semantics:

The 'llvm.va_copy' intrinsic works just like the va_copy macro available in C. In a target-dependent way, it copies the source va_list element into the destination va_list element. This intrinsic is necessary because the llvm.va_start intrinsic may be arbitrarily complex and require, for example, memory allocation.

Syntax:

This is an overloaded intrinsic function. You can use bswap on any integer type that is an even number of bytes (i.e. BitWidth % 16 == 0).

  declare i16 @llvm.bswap.i16(i16 <id>)
  declare i32 @llvm.bswap.i32(i32 <id>)
  declare i64 @llvm.bswap.i64(i64 <id>)

Overview:

The 'llvm.bswap' family of intrinsics is used to byte swap integer values with an even number of bytes (positive multiple of 16 bits). These are useful for performing operations on data that is not in the target's native byte order.

Semantics:

The llvm.bswap.i16 intrinsic returns an i16 value that has the high and low byte of the input i16 swapped. Similarly, the llvm.bswap.i32 intrinsic returns an i32 value that has the four bytes of the input i32 swapped, so that if the input bytes are numbered 0, 1, 2, 3 then the returned i32 will have its bytes in 3, 2, 1, 0 order. The llvm.bswap.i48, llvm.bswap.i64 and other intrinsics extend this concept to additional even-byte lengths (6 bytes, 8 bytes and more, respectively).

Syntax:

This is an overloaded intrinsic. You can use llvm.ctpop on any integer bit width, or on any vector with integer elements. Not all targets support all bit widths or vector types, however.

  declare i8 @llvm.ctpop.i8(i8  <src>)
  declare i16 @llvm.ctpop.i16(i16 <src>)
  declare i32 @llvm.ctpop.i32(i32 <src>)
  declare i64 @llvm.ctpop.i64(i64 <src>)
  declare i256 @llvm.ctpop.i256(i256 <src>)
  declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32> <src>)

Overview:

The 'llvm.ctpop' family of intrinsics counts the number of bits set in a value.

Arguments:

The only argument is the value to be counted. The argument may be of any integer type, or a vector with integer elements. The return type must match the argument type.

Semantics:

The 'llvm.ctpop' intrinsic counts the 1's in a variable, or within each element of a vector.

Syntax:

This is an overloaded intrinsic. You can use llvm.ctlz on any integer bit width, or any vector whose elements are integers. Not all targets support all bit widths or vector types, however.

  declare i8 @llvm.ctlz.i8 (i8  <src>)
  declare i16 @llvm.ctlz.i16(i16 <src>)
  declare i32 @llvm.ctlz.i32(i32 <src>)
  declare i64 @llvm.ctlz.i64(i64 <src>)
  declare i256 @llvm.ctlz.i256(i256 <src>)
  declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32> <src;gt)

Overview:

The 'llvm.ctlz' family of intrinsic functions counts the number of leading zeros in a variable.

Arguments:

The only argument is the value to be counted. The argument may be of any integer type, or any vector type with integer element type. The return type must match the argument type.

Semantics:

The 'llvm.ctlz' intrinsic counts the leading (most significant) zeros in a variable, or within each element of the vector if the operation is of vector type. If the src == 0 then the result is the size in bits of the type of src. For example, llvm.ctlz(i32 2) = 30.

Syntax:

This is an overloaded intrinsic. You can use llvm.cttz on any integer bit width, or any vector of integer elements. Not all targets support all bit widths or vector types, however.

  declare i8 @llvm.cttz.i8 (i8  <src>)
  declare i16 @llvm.cttz.i16(i16 <src>)
  declare i32 @llvm.cttz.i32(i32 <src>)
  declare i64 @llvm.cttz.i64(i64 <src>)
  declare i256 @llvm.cttz.i256(i256 <src>)
  declase <2 x i32> @llvm.cttz.v2i32(<2 x i32> <src>)

Overview:

The 'llvm.cttz' family of intrinsic functions counts the number of trailing zeros.

Arguments:

The only argument is the value to be counted. The argument may be of any integer type, or a vectory with integer element type.. The return type must match the argument type.

Semantics:

The 'llvm.cttz' intrinsic counts the trailing (least significant) zeros in a variable, or within each element of a vector. If the src == 0 then the result is the size in bits of the type of src. For example, llvm.cttz(2) = 1.

Syntax:

This is an overloaded intrinsic. You can use llvm.sadd.with.overflow on any integer bit width.

  declare {i16, i1} @llvm.sadd.with.overflow.i16(i16 %a, i16 %b)
  declare {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
  declare {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)

Overview:

The 'llvm.sadd.with.overflow' family of intrinsic functions perform a signed addition of the two arguments, and indicate whether an overflow occurred during the signed summation.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo signed addition.

Semantics:

The 'llvm.sadd.with.overflow' family of intrinsic functions perform a signed addition of the two variables. They return a structure — the first element of which is the signed summation, and the second element of which is a bit specifying if the signed summation resulted in an overflow.

Examples:

  %res = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
  %sum = extractvalue {i32, i1} %res, 0
  %obit = extractvalue {i32, i1} %res, 1
  br i1 %obit, label %overflow, label %normal

Syntax:

This is an overloaded intrinsic. You can use llvm.uadd.with.overflow on any integer bit width.

  declare {i16, i1} @llvm.uadd.with.overflow.i16(i16 %a, i16 %b)
  declare {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  declare {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)

Overview:

The 'llvm.uadd.with.overflow' family of intrinsic functions perform an unsigned addition of the two arguments, and indicate whether a carry occurred during the unsigned summation.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo unsigned addition.

Semantics:

The 'llvm.uadd.with.overflow' family of intrinsic functions perform an unsigned addition of the two arguments. They return a structure — the first element of which is the sum, and the second element of which is a bit specifying if the unsigned summation resulted in a carry.

Examples:

  %res = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %sum = extractvalue {i32, i1} %res, 0
  %obit = extractvalue {i32, i1} %res, 1
  br i1 %obit, label %carry, label %normal

Syntax:

This is an overloaded intrinsic. You can use llvm.ssub.with.overflow on any integer bit width.

  declare {i16, i1} @llvm.ssub.with.overflow.i16(i16 %a, i16 %b)
  declare {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
  declare {i64, i1} @llvm.ssub.with.overflow.i64(i64 %a, i64 %b)

Overview:

The 'llvm.ssub.with.overflow' family of intrinsic functions perform a signed subtraction of the two arguments, and indicate whether an overflow occurred during the signed subtraction.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo signed subtraction.

Semantics:

The 'llvm.ssub.with.overflow' family of intrinsic functions perform a signed subtraction of the two arguments. They return a structure — the first element of which is the subtraction, and the second element of which is a bit specifying if the signed subtraction resulted in an overflow.

Examples:

  %res = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
  %sum = extractvalue {i32, i1} %res, 0
  %obit = extractvalue {i32, i1} %res, 1
  br i1 %obit, label %overflow, label %normal

Syntax:

This is an overloaded intrinsic. You can use llvm.usub.with.overflow on any integer bit width.

  declare {i16, i1} @llvm.usub.with.overflow.i16(i16 %a, i16 %b)
  declare {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
  declare {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)

Overview:

The 'llvm.usub.with.overflow' family of intrinsic functions perform an unsigned subtraction of the two arguments, and indicate whether an overflow occurred during the unsigned subtraction.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo unsigned subtraction.

Semantics:

The 'llvm.usub.with.overflow' family of intrinsic functions perform an unsigned subtraction of the two arguments. They return a structure — the first element of which is the subtraction, and the second element of which is a bit specifying if the unsigned subtraction resulted in an overflow.

Examples:

  %res = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
  %sum = extractvalue {i32, i1} %res, 0
  %obit = extractvalue {i32, i1} %res, 1
  br i1 %obit, label %overflow, label %normal

Syntax:

This is an overloaded intrinsic. You can use llvm.smul.with.overflow on any integer bit width.

  declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
  declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
  declare {i64, i1} @llvm.smul.with.overflow.i64(i64 %a, i64 %b)

Overview:

The 'llvm.smul.with.overflow' family of intrinsic functions perform a signed multiplication of the two arguments, and indicate whether an overflow occurred during the signed multiplication.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo signed multiplication.

Semantics:

The 'llvm.smul.with.overflow' family of intrinsic functions perform a signed multiplication of the two arguments. They return a structure — the first element of which is the multiplication, and the second element of which is a bit specifying if the signed multiplication resulted in an overflow.

Examples:

  %res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
  %sum = extractvalue {i32, i1} %res, 0
  %obit = extractvalue {i32, i1} %res, 1
  br i1 %obit, label %overflow, label %normal

Syntax:

This is an overloaded intrinsic. You can use llvm.umul.with.overflow on any integer bit width.

  declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b)
  declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
  declare {i64, i1} @llvm.umul.with.overflow.i64(i64 %a, i64 %b)

Overview:

The 'llvm.umul.with.overflow' family of intrinsic functions perform a unsigned multiplication of the two arguments, and indicate whether an overflow occurred during the unsigned multiplication.

Arguments:

The arguments (%a and %b) and the first element of the result structure may be of integer types of any bit width, but they must have the same bit width. The second element of the result structure must be of type i1. %a and %b are the two values that will undergo unsigned multiplication.

Semantics:

The 'llvm.umul.with.overflow' family of intrinsic functions perform an unsigned multiplication of the two arguments. They return a structure — the first element of which is the multiplication, and the second element of which is a bit specifying if the unsigned multiplication resulted in an overflow.

Examples:

  %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
  %sum = extractvalue {i32, i1} %res, 0
  %obit = extractvalue {i32, i1} %res, 1
  br i1 %obit, label %overflow, label %normal

Syntax:

  declare i16 @llvm.convert.to.fp16(f32 %a)

Overview:

The 'llvm.convert.to.fp16' intrinsic function performs a conversion from single precision floating point format to half precision floating point format.

Arguments:

The intrinsic function contains single argument - the value to be converted.

Semantics:

The 'llvm.convert.to.fp16' intrinsic function performs a conversion from single precision floating point format to half precision floating point format. The return value is an i16 which contains the converted number.

Examples:

  %res = call i16 @llvm.convert.to.fp16(f32 %a)
  store i16 %res, i16* @x, align 2

Syntax:

  declare f32 @llvm.convert.from.fp16(i16 %a)

Overview:

The 'llvm.convert.from.fp16' intrinsic function performs a conversion from half precision floating point format to single precision floating point format.

Arguments:

The intrinsic function contains single argument - the value to be converted.

Semantics:

The 'llvm.convert.from.fp16' intrinsic function performs a conversion from half single precision floating point format to single precision floating point format. The input half-float value is represented by an i16 value.

Examples:

  %a = load i16* @x, align 2
  %res = call f32 @llvm.convert.from.fp16(i16 %a)

Syntax:

  declare void @llvm.init.trampoline(i8* <tramp>, i8* <func>, i8* <nval>)

Overview:

This fills the memory pointed to by tramp with executable code, turning it into a trampoline.

Arguments:

The llvm.init.trampoline intrinsic takes three arguments, all pointers. The tramp argument must point to a sufficiently large and sufficiently aligned block of memory; this memory is written to by the intrinsic. Note that the size and the alignment are target-specific - LLVM currently provides no portable way of determining them, so a front-end that generates this intrinsic needs to have some target-specific knowledge. The func argument must hold a function bitcast to an i8*.

Semantics:

The block of memory pointed to by tramp is filled with target dependent code, turning it into a function. Then tramp needs to be passed to llvm.adjust.trampoline to get a pointer which can be bitcast (to a new function) and called. The new function's signature is the same as that of func with any arguments marked with the nest attribute removed. At most one such nest argument is allowed, and it must be of pointer type. Calling the new function is equivalent to calling func with the same argument list, but with nval used for the missing nest argument. If, after calling llvm.init.trampoline, the memory pointed to by tramp is modified, then the effect of any later call to the returned function pointer is undefined.

Syntax:

  declare i8* @llvm.adjust.trampoline(i8* <tramp>)

Overview:

This performs any required machine-specific adjustment to the address of a trampoline (passed as tramp).

Arguments:

tramp must point to a block of memory which already has trampoline code filled in by a previous call to llvm.init.trampoline .

Semantics:

On some architectures the address of the code to be executed needs to be different to the address where the trampoline is actually stored. This intrinsic returns the executable address corresponding to tramp after performing the required machine specific adjustments. The pointer returned can then be bitcast and executed.

Syntax:

  declare void @llvm.memory.barrier(i1 <ll>, i1 <ls>, i1 <sl>, i1 <ss>, i1 <device>)

Overview:

The llvm.memory.barrier intrinsic guarantees ordering between specific pairs of memory access types.

Arguments:

The llvm.memory.barrier intrinsic requires five boolean arguments. The first four arguments enables a specific barrier as listed below. The fifth argument specifies that the barrier applies to io or device or uncached memory.

• ll: load-load barrier
• ls: load-store barrier
• sl: store-load barrier
• ss: store-store barrier
• device: barrier applies to device and uncached memory also.

Semantics:

This intrinsic causes the system to enforce some ordering constraints upon the loads and stores of the program. This barrier does not indicate when any events will occur, it only enforces an order in which they occur. For any of the specified pairs of load and store operations (f.ex. load-load, or store-load), all of the first operations preceding the barrier will complete before any of the second operations succeeding the barrier begin. Specifically the semantics for each pairing is as follows:

• ll: All loads before the barrier must complete before any load after the barrier begins.
• ls: All loads before the barrier must complete before any store after the barrier begins.
• ss: All stores before the barrier must complete before any store after the barrier begins.
• sl: All stores before the barrier must complete before any load after the barrier begins.

These semantics are applied with a logical "and" behavior when more than one is enabled in a single memory barrier intrinsic.

Backends may implement stronger barriers than those requested when they do not support as fine grained a barrier as requested. Some architectures do not need all types of barriers and on such architectures, these become noops.

Example:

%mallocP  = tail call i8* @malloc(i32 ptrtoint (i32* getelementptr (i32* null, i32 1) to i32))
%ptr      = bitcast i8* %mallocP to i32*
            store i32 4, %ptr

%result1  = load i32* %ptr      ; yields {i32}:result1 = 4
            call void @llvm.memory.barrier(i1 false, i1 true, i1 false, i1 false, i1 true)
                                ; guarantee the above finishes
            store i32 8, %ptr   ; before this begins

Syntax:

This is an overloaded intrinsic. You can use llvm.atomic.cmp.swap on any integer bit width and for different address spaces. Not all targets support all bit widths however.

  declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* <ptr>, i8 <cmp>, i8 <val>)
  declare i16 @llvm.atomic.cmp.swap.i16.p0i16(i16* <ptr>, i16 <cmp>, i16 <val>)
  declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* <ptr>, i32 <cmp>, i32 <val>)
  declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* <ptr>, i64 <cmp>, i64 <val>)

Overview:

This loads a value in memory and compares it to a given value. If they are equal, it stores a new value into the memory.

Arguments:

The llvm.atomic.cmp.swap intrinsic takes three arguments. The result as well as both cmp and val must be integer values with the same bit width. The ptr argument must be a pointer to a value of this integer type. While any bit width integer may be used, targets may only lower representations they support in hardware.

Semantics:

This entire intrinsic must be executed atomically. It first loads the value in memory pointed to by ptr and compares it with the value cmp. If they are equal, val is stored into the memory. The loaded value is yielded in all cases. This provides the equivalent of an atomic compare-and-swap operation within the SSA framework.

Examples:

%mallocP  = tail call i8* @malloc(i32 ptrtoint (i32* getelementptr (i32* null, i32 1) to i32))
%ptr      = bitcast i8* %mallocP to i32*
            store i32 4, %ptr

%val1     = add i32 4, 4
%result1  = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %ptr, i32 4, %val1)
                                          ; yields {i32}:result1 = 4
%stored1  = icmp eq i32 %result1, 4       ; yields {i1}:stored1 = true
%memval1  = load i32* %ptr                ; yields {i32}:memval1 = 8

%val2     = add i32 1, 1
%result2  = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %ptr, i32 5, %val2)
                                          ; yields {i32}:result2 = 8
%stored2  = icmp eq i32 %result2, 5       ; yields {i1}:stored2 = false

%memval2  = load i32* %ptr                ; yields {i32}:memval2 = 8

Syntax:

This is an overloaded intrinsic. You can use llvm.atomic.swap on any integer bit width. Not all targets support all bit widths however.

  declare i8 @llvm.atomic.swap.i8.p0i8(i8* <ptr>, i8 <val>)
  declare i16 @llvm.atomic.swap.i16.p0i16(i16* <ptr>, i16 <val>)
  declare i32 @llvm.atomic.swap.i32.p0i32(i32* <ptr>, i32 <val>)
  declare i64 @llvm.atomic.swap.i64.p0i64(i64* <ptr>, i64 <val>)

Overview:

This intrinsic loads the value stored in memory at ptr and yields the value from memory. It then stores the value in val in the memory at ptr.

Arguments:

The llvm.atomic.swap intrinsic takes two arguments. Both the val argument and the result must be integers of the same bit width. The first argument, ptr, must be a pointer to a value of this integer type. The targets may only lower integer representations they support.

Semantics:

This intrinsic loads the value pointed to by ptr, yields it, and stores val back into ptr atomically. This provides the equivalent of an atomic swap operation within the SSA framework.

Examples:

%mallocP  = tail call i8* @malloc(i32 ptrtoint (i32* getelementptr (i32* null, i32 1) to i32))
%ptr      = bitcast i8* %mallocP to i32*
            store i32 4, %ptr

%val1     = add i32 4, 4
%result1  = call i32 @llvm.atomic.swap.i32.p0i32(i32* %ptr, i32 %val1)
                                        ; yields {i32}:result1 = 4
%stored1  = icmp eq i32 %result1, 4     ; yields {i1}:stored1 = true
%memval1  = load i32* %ptr              ; yields {i32}:memval1 = 8

%val2     = add i32 1, 1
%result2  = call i32 @llvm.atomic.swap.i32.p0i32(i32* %ptr, i32 %val2)
                                        ; yields {i32}:result2 = 8

%stored2  = icmp eq i32 %result2, 8     ; yields {i1}:stored2 = true
%memval2  = load i32* %ptr              ; yields {i32}:memval2 = 2

Syntax:

This is an overloaded intrinsic. You can use llvm.atomic.load.add on any integer bit width. Not all targets support all bit widths however.

  declare i8 @llvm.atomic.load.add.i8.p0i8(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.add.i16.p0i16(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.add.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.add.i64.p0i64(i64* <ptr>, i64 <delta>)

Overview:

This intrinsic adds delta to the value stored in memory at ptr. It yields the original value at ptr.

Arguments:

The intrinsic takes two arguments, the first a pointer to an integer value and the second an integer value. The result is also an integer value. These integer types can have any bit width, but they must all have the same bit width. The targets may only lower integer representations they support.

Semantics:

This intrinsic does a series of operations atomically. It first loads the value stored at ptr. It then adds delta, stores the result to ptr. It yields the original value stored at ptr.

Examples:

%mallocP  = tail call i8* @malloc(i32 ptrtoint (i32* getelementptr (i32* null, i32 1) to i32))
%ptr      = bitcast i8* %mallocP to i32*
            store i32 4, %ptr
%result1  = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %ptr, i32 4)
                                ; yields {i32}:result1 = 4
%result2  = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %ptr, i32 2)
                                ; yields {i32}:result2 = 8
%result3  = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %ptr, i32 5)
                                ; yields {i32}:result3 = 10
%memval1  = load i32* %ptr      ; yields {i32}:memval1 = 15

Syntax:

This is an overloaded intrinsic. You can use llvm.atomic.load.sub on any integer bit width and for different address spaces. Not all targets support all bit widths however.

  declare i8 @llvm.atomic.load.sub.i8.p0i32(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.sub.i16.p0i32(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.sub.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.sub.i64.p0i32(i64* <ptr>, i64 <delta>)

Overview:

This intrinsic subtracts delta to the value stored in memory at ptr. It yields the original value at ptr.

Arguments:

The intrinsic takes two arguments, the first a pointer to an integer value and the second an integer value. The result is also an integer value. These integer types can have any bit width, but they must all have the same bit width. The targets may only lower integer representations they support.

Semantics:

This intrinsic does a series of operations atomically. It first loads the value stored at ptr. It then subtracts delta, stores the result to ptr. It yields the original value stored at ptr.

Examples:

%mallocP  = tail call i8* @malloc(i32 ptrtoint (i32* getelementptr (i32* null, i32 1) to i32))
%ptr      = bitcast i8* %mallocP to i32*
            store i32 8, %ptr
%result1  = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %ptr, i32 4)
                                ; yields {i32}:result1 = 8
%result2  = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %ptr, i32 2)
                                ; yields {i32}:result2 = 4
%result3  = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %ptr, i32 5)
                                ; yields {i32}:result3 = 2
%memval1  = load i32* %ptr      ; yields {i32}:memval1 = -3

Syntax:

These are overloaded intrinsics. You can use llvm.atomic.load_and, llvm.atomic.load_nand, llvm.atomic.load_or, and llvm.atomic.load_xor on any integer bit width and for different address spaces. Not all targets support all bit widths however.

  declare i8 @llvm.atomic.load.and.i8.p0i8(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.and.i16.p0i16(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.and.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.and.i64.p0i64(i64* <ptr>, i64 <delta>)

  declare i8 @llvm.atomic.load.or.i8.p0i8(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.or.i16.p0i16(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.or.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.or.i64.p0i64(i64* <ptr>, i64 <delta>)

  declare i8 @llvm.atomic.load.nand.i8.p0i32(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.nand.i16.p0i32(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.nand.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.nand.i64.p0i32(i64* <ptr>, i64 <delta>)

  declare i8 @llvm.atomic.load.xor.i8.p0i32(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.xor.i16.p0i32(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.xor.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.xor.i64.p0i32(i64* <ptr>, i64 <delta>)

Overview:

These intrinsics bitwise the operation (and, nand, or, xor) delta to the value stored in memory at ptr. It yields the original value at ptr.

Arguments:

These intrinsics take two arguments, the first a pointer to an integer value and the second an integer value. The result is also an integer value. These integer types can have any bit width, but they must all have the same bit width. The targets may only lower integer representations they support.

Semantics:

These intrinsics does a series of operations atomically. They first load the value stored at ptr. They then do the bitwise operation delta, store the result to ptr. They yield the original value stored at ptr.

Examples:

%mallocP  = tail call i8* @malloc(i32 ptrtoint (i32* getelementptr (i32* null, i32 1) to i32))
%ptr      = bitcast i8* %mallocP to i32*
            store i32 0x0F0F, %ptr
%result0  = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %ptr, i32 0xFF)
                                ; yields {i32}:result0 = 0x0F0F
%result1  = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %ptr, i32 0xFF)
                                ; yields {i32}:result1 = 0xFFFFFFF0
%result2  = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %ptr, i32 0F)
                                ; yields {i32}:result2 = 0xF0
%result3  = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %ptr, i32 0F)
                                ; yields {i32}:result3 = FF
%memval1  = load i32* %ptr      ; yields {i32}:memval1 = F0

Syntax:

These are overloaded intrinsics. You can use llvm.atomic.load_max, llvm.atomic.load_min, llvm.atomic.load_umax, and llvm.atomic.load_umin on any integer bit width and for different address spaces. Not all targets support all bit widths however.

  declare i8 @llvm.atomic.load.max.i8.p0i8(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.max.i16.p0i16(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.max.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.max.i64.p0i64(i64* <ptr>, i64 <delta>)

  declare i8 @llvm.atomic.load.min.i8.p0i8(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.min.i16.p0i16(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.min.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.min.i64.p0i64(i64* <ptr>, i64 <delta>)

  declare i8 @llvm.atomic.load.umax.i8.p0i8(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.umax.i16.p0i16(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.umax.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.umax.i64.p0i64(i64* <ptr>, i64 <delta>)

  declare i8 @llvm.atomic.load.umin.i8.p0i8(i8* <ptr>, i8 <delta>)
  declare i16 @llvm.atomic.load.umin.i16.p0i16(i16* <ptr>, i16 <delta>)
  declare i32 @llvm.atomic.load.umin.i32.p0i32(i32* <ptr>, i32 <delta>)
  declare i64 @llvm.atomic.load.umin.i64.p0i64(i64* <ptr>, i64 <delta>)

Overview:

These intrinsics takes the signed or unsigned minimum or maximum of delta and the value stored in memory at ptr. It yields the original value at ptr.

Arguments:

These intrinsics take two arguments, the first a pointer to an integer value and the second an integer value. The result is also an integer value. These integer types can have any bit width, but they must all have the same bit width. The targets may only lower integer representations they support.

Semantics:

These intrinsics does a series of operations atomically. They first load the value stored at ptr. They then do the signed or unsigned min or max delta and the value, store the result to ptr. They yield the original value stored at ptr.

Examples:

%mallocP  = tail call i8* @malloc(i32 ptrtoint (i32* getelementptr (i32* null, i32 1) to i32))
%ptr      = bitcast i8* %mallocP to i32*
            store i32 7, %ptr
%result0  = call i32 @llvm.atomic.load.min.i32.p0i32(i32* %ptr, i32 -2)
                                ; yields {i32}:result0 = 7
%result1  = call i32 @llvm.atomic.load.max.i32.p0i32(i32* %ptr, i32 8)
                                ; yields {i32}:result1 = -2
%result2  = call i32 @llvm.atomic.load.umin.i32.p0i32(i32* %ptr, i32 10)
                                ; yields {i32}:result2 = 8
%result3  = call i32 @llvm.atomic.load.umax.i32.p0i32(i32* %ptr, i32 30)
                                ; yields {i32}:result3 = 8
%memval1  = load i32* %ptr      ; yields {i32}:memval1 = 30

Syntax:

  declare void @llvm.lifetime.start(i64 <size>, i8* nocapture <ptr>)

Overview:

The 'llvm.lifetime.start' intrinsic specifies the start of a memory object's lifetime.

Arguments:

The first argument is a constant integer representing the size of the object, or -1 if it is variable sized. The second argument is a pointer to the object.

Semantics:

This intrinsic indicates that before this point in the code, the value of the memory pointed to by ptr is dead. This means that it is known to never be used and has an undefined value. A load from the pointer that precedes this intrinsic can be replaced with 'undef'.

Syntax:

  declare void @llvm.lifetime.end(i64 <size>, i8* nocapture <ptr>)

Overview:

The 'llvm.lifetime.end' intrinsic specifies the end of a memory object's lifetime.

Arguments:

The first argument is a constant integer representing the size of the object, or -1 if it is variable sized. The second argument is a pointer to the object.

Semantics:

This intrinsic indicates that after this point in the code, the value of the memory pointed to by ptr is dead. This means that it is known to never be used and has an undefined value. Any stores into the memory object following this intrinsic may be removed as dead.

Syntax:

  declare {}* @llvm.invariant.start(i64 <size>, i8* nocapture <ptr>)

Overview:

The 'llvm.invariant.start' intrinsic specifies that the contents of a memory object will not change.

Arguments:

The first argument is a constant integer representing the size of the object, or -1 if it is variable sized. The second argument is a pointer to the object.

Semantics:

This intrinsic indicates that until an llvm.invariant.end that uses the return value, the referenced memory location is constant and unchanging.

Syntax:

  declare void @llvm.invariant.end({}* <start>, i64 <size>, i8* nocapture <ptr>)

Overview:

The 'llvm.invariant.end' intrinsic specifies that the contents of a memory object are mutable.

Arguments:

The first argument is the matching llvm.invariant.start intrinsic. The second argument is a constant integer representing the size of the object, or -1 if it is variable sized and the third argument is a pointer to the object.

Semantics:

This intrinsic indicates that the memory is mutable again.

Syntax:

  declare void @llvm.var.annotation(i8* <val>, i8* <str>, i8* <str>, i32  <int>)

Overview:

The 'llvm.var.annotation' intrinsic.

Arguments:

The first argument is a pointer to a value, the second is a pointer to a global string, the third is a pointer to a global string which is the source file name, and the last argument is the line number.

Semantics:

This intrinsic allows annotation of local variables with arbitrary strings. This can be useful for special purpose optimizations that want to look for these annotations. These have no other defined use; they are ignored by code generation and optimization.

Syntax:

This is an overloaded intrinsic. You can use 'llvm.annotation' on any integer bit width.

  declare i8 @llvm.annotation.i8(i8 <val>, i8* <str>, i8* <str>, i32  <int>)
  declare i16 @llvm.annotation.i16(i16 <val>, i8* <str>, i8* <str>, i32  <int>)
  declare i32 @llvm.annotation.i32(i32 <val>, i8* <str>, i8* <str>, i32  <int>)
  declare i64 @llvm.annotation.i64(i64 <val>, i8* <str>, i8* <str>, i32  <int>)
  declare i256 @llvm.annotation.i256(i256 <val>, i8* <str>, i8* <str>, i32  <int>)

Overview:

The 'llvm.annotation' intrinsic.

Arguments:

The first argument is an integer value (result of some expression), the second is a pointer to a global string, the third is a pointer to a global string which is the source file name, and the last argument is the line number. It returns the value of the first argument.

Semantics:

This intrinsic allows annotations to be put on arbitrary expressions with arbitrary strings. This can be useful for special purpose optimizations that want to look for these annotations. These have no other defined use; they are ignored by code generation and optimization.

Syntax:

  declare void @llvm.trap()

Overview:

The 'llvm.trap' intrinsic.

Arguments:

None.

Semantics:

This intrinsics is lowered to the target dependent trap instruction. If the target does not have a trap instruction, this intrinsic will be lowered to the call of the abort() function.

Syntax:

  declare void @llvm.stackprotector(i8* <guard>, i8** <slot>)

Overview:

The llvm.stackprotector intrinsic takes the guard and stores it onto the stack at slot. The stack slot is adjusted to ensure that it is placed on the stack before local variables.

Arguments:

The llvm.stackprotector intrinsic requires two pointer arguments. The first argument is the value loaded from the stack guard @__stack_chk_guard. The second variable is an alloca that has enough space to hold the value of the guard.

Semantics:

This intrinsic causes the prologue/epilogue inserter to force the position of the AllocaInst stack slot to be before local variables on the stack. This is to ensure that if a local variable on the stack is overwritten, it will destroy the value of the guard. When the function exits, the guard on the stack is checked against the original guard. If they are different, then the program aborts by calling the __stack_chk_fail() function.

Syntax:

  declare i32 @llvm.objectsize.i32(i8* <object>, i1 <type>)
  declare i64 @llvm.objectsize.i64(i8* <object>, i1 <type>)

Overview:

The llvm.objectsize intrinsic is designed to provide information to the optimizers to determine at compile time whether a) an operation (like memcpy) will overflow a buffer that corresponds to an object, or b) that a runtime check for overflow isn't necessary. An object in this context means an allocation of a specific class, structure, array, or other object.

Arguments:

The llvm.objectsize intrinsic takes two arguments. The first argument is a pointer to or into the object. The second argument is a boolean 0 or 1. This argument determines whether you want the maximum (0) or minimum (1) bytes remaining. This needs to be a literal 0 or 1, variables are not allowed.

Semantics:

The llvm.objectsize intrinsic is lowered to either a constant representing the size of the object concerned, or i32/i64 -1 or 0, depending on the type argument, if the size cannot be determined at compile time.