Arnold Schwaighofer 00cc11273b ISel: Fix FastISel of swifterror values ...

The code assumed that we process instructions in basic block order.  FastISel
processes instructions in reverse basic block order. We need to pre-assign
virtual registers before selecting otherwise we get def-use relationships wrong.

This only affects code with swifterror registers.

rdar://32659327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305484 91177308-0d34-0410-b5e6-96231b3b80d8

2017-06-15 17:34:42 +00:00

..

llvm

ISel: Fix FastISel of swifterror values

2017-06-15 17:34:42 +00:00

llvm-c

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