Coby Tayree 57e555600b The 'vpmultishiftqb' instruction was implemented falsely, this patch amend it. ...

More specifically - (MS dialect) broadcasting variants were implemented falsely.

Differential Revision: https://reviews.llvm.org/D26257



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287501 91177308-0d34-0410-b5e6-96231b3b80d8

2016-11-20 17:19:55 +00:00

..

AArch64

[MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser.

2016-11-08 18:31:04 +00:00

AMDGPU

AMDGPU: Fix formatting of 1/2pi immediate

2016-11-15 00:04:33 +00:00

ARM

[ARM] Thumb2 LDR (literal) should accept PC as the destination

2016-11-10 13:20:41 +00:00

AsmParser

[MC] Make llvm-mc fail cleanly on invalid output asm variant.

2016-10-31 18:36:31 +00:00

AVR

[AVR] Add all of the machine code test suite

2016-11-09 23:46:25 +00:00

COFF

Emit S_COMPILE3 record once per TU rather than once per function

2016-11-02 21:30:35 +00:00

Disassembler

[AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd.

2016-11-13 19:58:18 +00:00

ELF

Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.

2016-10-27 23:20:19 +00:00

Hexagon

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Lanai

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MachO

Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.

2016-10-27 23:20:19 +00:00

Markup

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Mips

[mips] not instruction alias

2016-11-16 11:04:49 +00:00

PowerPC

[PPC] add absolute difference altivec instructions and matching intrinsics

2016-10-31 19:47:52 +00:00

Sparc

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SystemZ

[SystemZ] Support CL(G)T instructions

2016-11-11 12:48:26 +00:00

X86

The 'vpmultishiftqb' instruction was implemented falsely, this patch amend it.

2016-11-20 17:19:55 +00:00