Michael Zuckerman 59dfeede45 [X86] Add support for mmword memory operand size for Intel-syntax x86 assembly ...

Differential Revision: http://reviews.llvm.org/D12151


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245835 91177308-0d34-0410-b5e6-96231b3b80d8

2015-08-24 10:26:54 +00:00

..

AArch64

[AArch64] Improve short-form diags on long-form Match_InvalidOperand.

2015-08-19 17:40:19 +00:00

AMDGPU

AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions

2015-08-07 22:00:56 +00:00

ARM

Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI

2015-08-10 19:01:27 +00:00

AsmParser

Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI

2015-08-10 19:01:27 +00:00

COFF

Revert "Centralize the information about which object format we are using."

2015-08-14 15:48:41 +00:00

Disassembler

[mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions

2015-08-20 11:51:49 +00:00

ELF

Convert tests under MC/ELF from macho-dump to llvm-readobj.

2015-08-14 15:16:37 +00:00

Hexagon

[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.

2015-06-05 16:00:11 +00:00

MachO

[llvm-readobj] Test --macho-data-in-code option.

2015-08-22 20:30:56 +00:00

Markup

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Mips

[mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions

2015-08-20 11:51:49 +00:00

PowerPC

Scalar to vector conversions using direct moves

2015-08-13 17:40:44 +00:00

Sparc

[Sparc]: correct the 'set' synthetic instruction

2015-08-20 16:16:16 +00:00

SystemZ

[SystemZ] Add z13 vector facility and MC support

2015-05-05 19:23:40 +00:00

X86

[X86] Add support for mmword memory operand size for Intel-syntax x86 assembly

2015-08-24 10:26:54 +00:00