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454a57ccb6
Mark kernels that use certain features that require user SGPRs to support with kernel attributes. We need to know before instruction selection begins because it impacts the kernel calling convention lowering. For now this only detects the workitem intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252323 91177308-0d34-0410-b5e6-96231b3b80d8
126 lines
3.7 KiB
C++
126 lines
3.7 KiB
C++
//===-- AMDGPUAnnotateKernelFeaturesPass.cpp ------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This pass adds target attributes to functions which use intrinsics
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/// which will impact calling convention lowering.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Module.h"
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#define DEBUG_TYPE "amdgpu-annotate-kernel-features"
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using namespace llvm;
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namespace {
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class AMDGPUAnnotateKernelFeatures : public ModulePass {
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private:
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void addAttrToCallers(Function *Intrin, StringRef AttrName);
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bool addAttrsForIntrinsics(Module &M, ArrayRef<StringRef[2]>);
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public:
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static char ID;
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AMDGPUAnnotateKernelFeatures() : ModulePass(ID) { }
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bool runOnModule(Module &M) override;
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const char *getPassName() const override {
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return "AMDGPU Annotate Kernel Features";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesAll();
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ModulePass::getAnalysisUsage(AU);
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}
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};
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}
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char AMDGPUAnnotateKernelFeatures::ID = 0;
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char &llvm::AMDGPUAnnotateKernelFeaturesID = AMDGPUAnnotateKernelFeatures::ID;
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INITIALIZE_PASS_BEGIN(AMDGPUAnnotateKernelFeatures, DEBUG_TYPE,
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"Add AMDGPU function attributes", false, false)
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INITIALIZE_PASS_END(AMDGPUAnnotateKernelFeatures, DEBUG_TYPE,
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"Add AMDGPU function attributes", false, false)
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void AMDGPUAnnotateKernelFeatures::addAttrToCallers(Function *Intrin,
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StringRef AttrName) {
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SmallPtrSet<Function *, 4> SeenFuncs;
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for (User *U : Intrin->users()) {
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// CallInst is the only valid user for an intrinsic.
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CallInst *CI = cast<CallInst>(U);
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Function *CallingFunction = CI->getParent()->getParent();
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if (SeenFuncs.insert(CallingFunction).second)
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CallingFunction->addFnAttr(AttrName);
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}
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}
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bool AMDGPUAnnotateKernelFeatures::addAttrsForIntrinsics(
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Module &M,
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ArrayRef<StringRef[2]> IntrinsicToAttr) {
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bool Changed = false;
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for (const StringRef *Arr : IntrinsicToAttr) {
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if (Function *Fn = M.getFunction(Arr[0])) {
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addAttrToCallers(Fn, Arr[1]);
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Changed = true;
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}
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}
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return Changed;
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}
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bool AMDGPUAnnotateKernelFeatures::runOnModule(Module &M) {
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Triple TT(M.getTargetTriple());
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static const StringRef IntrinsicToAttr[][2] = {
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// .x omitted
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{ "llvm.r600.read.tgid.y", "amdgpu-work-group-id-y" },
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{ "llvm.r600.read.tgid.z", "amdgpu-work-group-id-z" },
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// .x omitted
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{ "llvm.r600.read.tidig.y", "amdgpu-work-item-id-y" },
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{ "llvm.r600.read.tidig.z", "amdgpu-work-item-id-z" }
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};
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static const StringRef HSAIntrinsicToAttr[][2] = {
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{ "llvm.r600.read.local.size.x", "amdgpu-dispatch-ptr" },
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{ "llvm.r600.read.local.size.y", "amdgpu-dispatch-ptr" },
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{ "llvm.r600.read.local.size.z", "amdgpu-dispatch-ptr" },
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{ "llvm.r600.read.global.size.x", "amdgpu-dispatch-ptr" },
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{ "llvm.r600.read.global.size.y", "amdgpu-dispatch-ptr" },
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{ "llvm.r600.read.global.size.z", "amdgpu-dispatch-ptr" }
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};
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// TODO: Intrinsics that require queue ptr.
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// We do not need to note the x workitem or workgroup id because they are
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// always initialized.
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bool Changed = addAttrsForIntrinsics(M, IntrinsicToAttr);
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if (TT.getOS() == Triple::AMDHSA)
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Changed |= addAttrsForIntrinsics(M, HSAIntrinsicToAttr);
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return Changed;
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}
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ModulePass *llvm::createAMDGPUAnnotateKernelFeaturesPass() {
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return new AMDGPUAnnotateKernelFeatures();
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}
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