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b60ab5d110
The motivation for the change is that we can't have pseudo-global settings for
codegen living in TargetOptions because that doesn't work with LTO.
Ideally, these reciprocal attributes will be moved to the instruction-level via
FMF, metadata, or something else. But making them function attributes is at least
an improvement over the current state.
The ingredients of this patch are:
Remove the reciprocal estimate command-line debug option.
Add TargetRecip to TargetLowering.
Remove TargetRecip from TargetOptions.
Clean up the TargetRecip implementation to work with this new scheme.
Set the default reciprocal settings in TargetLoweringBase (everything is off).
Update the PowerPC defaults, users, and tests.
Update the x86 defaults, users, and tests.
Note that if this patch needs to be reverted, the related clang patch checked in
at r283251 should be reverted too.
Differential Revision: https://reviews.llvm.org/D24816
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283252 91177308-0d34-0410-b5e6-96231b3b80d8
53 lines
1.7 KiB
LLVM
53 lines
1.7 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2,fma -stop-after=expand-isel-pseudos 2>&1 | FileCheck %s
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declare float @llvm.sqrt.f32(float) #0
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define float @foo(float %f) #0 {
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; CHECK: {{name: *foo}}
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; CHECK: body:
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; CHECK: %0 = COPY %xmm0
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; CHECK: %1 = VRSQRTSSr killed %2, %0
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; CHECK: %3 = VMULSSrr %0, %1
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; CHECK: %4 = VMOVSSrm
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; CHECK: %5 = VFMADD213SSr %1, killed %3, %4
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; CHECK: %6 = VMOVSSrm
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; CHECK: %7 = VMULSSrr %1, %6
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; CHECK: %8 = VMULSSrr killed %7, killed %5
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; CHECK: %9 = VMULSSrr %0, %8
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; CHECK: %10 = VFMADD213SSr %8, %9, %4
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; CHECK: %11 = VMULSSrr %9, %6
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; CHECK: %12 = VMULSSrr killed %11, killed %10
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; CHECK: %13 = FsFLD0SS
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; CHECK: %14 = VCMPSSrr %0, killed %13, 0
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; CHECK: %15 = VFsANDNPSrr killed %14, killed %12
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; CHECK: %xmm0 = COPY %15
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; CHECK: RET 0, %xmm0
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%call = tail call float @llvm.sqrt.f32(float %f) #1
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ret float %call
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}
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define float @rfoo(float %f) #0 {
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; CHECK: {{name: *rfoo}}
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; CHECK: body: |
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; CHECK: %0 = COPY %xmm0
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; CHECK: %1 = VRSQRTSSr killed %2, %0
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; CHECK: %3 = VMULSSrr %0, %1
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; CHECK: %4 = VMOVSSrm
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; CHECK: %5 = VFMADD213SSr %1, killed %3, %4
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; CHECK: %6 = VMOVSSrm
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; CHECK: %7 = VMULSSrr %1, %6
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; CHECK: %8 = VMULSSrr killed %7, killed %5
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; CHECK: %9 = VMULSSrr %0, %8
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; CHECK: %10 = VFMADD213SSr %8, killed %9, %4
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; CHECK: %11 = VMULSSrr %8, %6
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; CHECK: %12 = VMULSSrr killed %11, killed %10
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; CHECK: %xmm0 = COPY %12
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; CHECK: RET 0, %xmm0
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%sqrt = tail call float @llvm.sqrt.f32(float %f)
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%div = fdiv fast float 1.0, %sqrt
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ret float %div
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}
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attributes #0 = { "unsafe-fp-math"="true" "reciprocal-estimates"="sqrt:2" }
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attributes #1 = { nounwind readnone }
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