| .. |
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AsmParser
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[AMDGPU] Add intrinsics for tbuffer load and store
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2017-06-22 16:29:22 +00:00 |
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Disassembler
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[AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failures
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2017-06-21 16:00:54 +00:00 |
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InstPrinter
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[AMDGPU] Add intrinsics for tbuffer load and store
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2017-06-22 16:29:22 +00:00 |
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MCTargetDesc
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AMDGPU: Whitespace fixes
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2017-06-26 03:01:36 +00:00 |
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TargetInfo
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
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Utils
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[AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src
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2017-06-21 14:41:34 +00:00 |
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AMDGPU.h
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AMDGPU: Register AMDGPUAlwaysInline
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2017-06-02 18:02:42 +00:00 |
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AMDGPU.td
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AMDGPU: Whitespace fixes
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2017-06-26 03:01:36 +00:00 |
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AMDGPUAliasAnalysis.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUAliasAnalysis.h
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AMDGPU/R600: Fix amdgpu alias analysis pass.
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2017-03-31 19:26:23 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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[AMDGPU] Testing commit access only, no real change
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2017-06-15 23:02:55 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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DivergencyAnalysis patch for review
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2017-06-15 19:33:10 +00:00 |
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AMDGPUAsmPrinter.cpp
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Move Object format code to lib/BinaryFormat.
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2017-06-07 03:48:56 +00:00 |
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AMDGPUAsmPrinter.h
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUCallLowering.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUFrameLowering.cpp
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
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AMDGPUFrameLowering.h
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
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AMDGPUGenRegisterBankInfo.def
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPUInstrInfo.cpp
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[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
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2017-06-21 08:53:38 +00:00 |
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AMDGPUInstrInfo.h
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUInstrInfo.td
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[AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc
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2017-06-21 22:05:06 +00:00 |
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AMDGPUInstructions.td
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[AMDGPU][MC] Added check for truncation of SOPK imm operand
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2017-04-26 15:34:19 +00:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU: Start adding offset fields to flat instructions
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2017-06-12 15:55:58 +00:00 |
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AMDGPUInstructionSelector.h
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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Rename AttributeSet to AttributeList
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2017-03-21 16:57:19 +00:00 |
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AMDGPUIntrinsicInfo.h
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AMDGPU: Change fdiv lowering based on !fpmath metadata
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2016-07-19 23:16:53 +00:00 |
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AMDGPUIntrinsics.td
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AMDGPU: Remove legacy bfe intrinsics
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2017-04-03 18:08:08 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Start selecting flat instruction offsets
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2017-06-12 16:53:51 +00:00 |
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AMDGPUISelLowering.cpp
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[AMDGPU] Add intrinsics for tbuffer load and store
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2017-06-22 16:29:22 +00:00 |
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AMDGPUISelLowering.h
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[AMDGPU] Add intrinsics for tbuffer load and store
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2017-06-22 16:29:22 +00:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal
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2017-06-26 15:56:52 +00:00 |
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AMDGPULegalizerInfo.h
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPULowerIntrinsics.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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AMDGPUMachineCFGStructurizer.cpp
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fix trivial typos, NFC
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2017-06-27 10:35:37 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUMachineFunction.h
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUMCInstLower.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUMCInstLower.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUPromoteAlloca.cpp
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[AMDGPU] Fix for issue in alloca to vector promotion pass
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2017-06-09 14:16:22 +00:00 |
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AMDGPUPTNote.h
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[AMDGPU] Restructure code object metadata creation
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2017-03-22 22:32:22 +00:00 |
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AMDGPURegAsmNames.inc.cpp
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AMDGPU: Work around build special casing .inc files
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2017-06-08 19:25:21 +00:00 |
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AMDGPURegisterBankInfo.cpp
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[RegisterBankInfo] Uniquely allocate instruction mapping.
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2017-05-05 22:48:22 +00:00 |
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AMDGPURegisterBankInfo.h
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPURegisterBanks.td
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPURegisterInfo.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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[AMDGPU] SDWA: add support for GFX9 in peephole pass
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2017-06-22 06:26:41 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] SDWA: add support for GFX9 in peephole pass
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2017-06-22 06:26:41 +00:00 |
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AMDGPUTargetMachine.cpp
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[AMDGPU] Add infer address spaces pass before SROA
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2017-06-19 23:17:36 +00:00 |
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AMDGPUTargetMachine.h
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TargetMachine: Indicate whether machine verifier passes.
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2017-05-31 18:41:23 +00:00 |
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AMDGPUTargetObjectFile.cpp
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Move Object format code to lib/BinaryFormat.
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2017-06-07 03:48:56 +00:00 |
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AMDGPUTargetObjectFile.h
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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AMDGPU: Allow vectorization of packed types
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2017-06-20 20:38:06 +00:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Allow vectorization of packed types
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2017-06-20 20:38:06 +00:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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AMDGPU: Unify divergent function exits.
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2017-03-24 19:52:05 +00:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Turn AMDGPUUnifyMetadata back into module pass
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2017-01-27 16:38:10 +00:00 |
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AMDILCFGStructurizer.cpp
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Remove unused functions. Remove static qualifier from functions in header files. NFC.
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2017-04-11 14:55:32 +00:00 |
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AMDKernelCodeT.h
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[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
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2016-02-24 10:54:25 +00:00 |
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BUFInstructions.td
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[AMDGPU] Add intrinsics for tbuffer load and store
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2017-06-22 16:29:22 +00:00 |
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CaymanInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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CIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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CMakeLists.txt
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AMDGPU: Work around build special casing .inc files
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2017-06-08 19:25:21 +00:00 |
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DSInstructions.td
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[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
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2017-05-31 16:26:47 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Fix unnecessary ands when packing f16 vectors
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2017-03-15 19:04:26 +00:00 |
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FLATInstructions.td
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AMDGPU: Start adding global_* instructions
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2017-06-20 19:54:14 +00:00 |
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GCNHazardRecognizer.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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GCNHazardRecognizer.h
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AMDGPU: Fix broken condition in hazard recognizer
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2017-03-17 21:36:28 +00:00 |
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GCNIterativeScheduler.cpp
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Make helper functions static. NFC.
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2017-05-26 20:09:00 +00:00 |
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GCNIterativeScheduler.h
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[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
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2017-03-21 13:15:46 +00:00 |
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GCNMinRegStrategy.cpp
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Make helper functions static. NFC.
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2017-05-26 20:09:00 +00:00 |
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GCNRegPressure.cpp
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Make helper functions static. NFC.
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2017-05-26 20:09:00 +00:00 |
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GCNRegPressure.h
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[AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker
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2017-05-22 13:09:40 +00:00 |
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GCNSchedStrategy.cpp
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[AMDGPU] Use GCNRPTracker dumper methods in scheduler
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2017-05-16 16:31:45 +00:00 |
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GCNSchedStrategy.h
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[AMDGPU] Cache live-ins and register pressure in scheduler
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2017-05-16 16:11:26 +00:00 |
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LLVMBuild.txt
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AMDGPU: Add GlobalISel to required_libraries.
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2017-01-28 18:13:08 +00:00 |
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MIMGInstructions.td
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AMDGPU: Remove legacy image intrinsics
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2017-04-04 16:34:35 +00:00 |
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Processors.td
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AMDGPU: Whitespace fixes
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2017-06-26 03:01:36 +00:00 |
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R600ClauseMergePass.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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R600ControlFlowFinalizer.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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R600Defines.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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R600EmitClauseMarkers.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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R600ExpandSpecialInstrs.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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R600FrameLowering.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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R600FrameLowering.h
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
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R600InstrFormats.td
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AMDGPU/R600: Convert buffer id to VTX_READ input
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2016-08-15 21:38:30 +00:00 |
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R600InstrInfo.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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R600InstrInfo.h
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Cyle -> Cycle; NFCI
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2017-03-15 15:37:42 +00:00 |
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R600Instructions.td
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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R600Intrinsics.td
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AMDGPU: Make intrinsics speculatable
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2017-05-02 16:57:44 +00:00 |
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R600ISelLowering.cpp
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AMDGPU: Cleanup CreateLiveInRegister
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2017-06-19 21:52:45 +00:00 |
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R600ISelLowering.h
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[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
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2017-05-24 15:59:09 +00:00 |
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R600MachineFunctionInfo.cpp
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineFunctionInfo.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineScheduler.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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R600MachineScheduler.h
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[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
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2016-12-09 22:06:55 +00:00 |
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R600OptimizeVectorRegisters.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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R600Packetizer.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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R600RegisterInfo.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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R600RegisterInfo.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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R600RegisterInfo.td
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[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)
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2017-05-23 21:27:15 +00:00 |
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R600Schedule.td
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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Remove now useless trailing nullptr in StructType::get
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2017-05-11 08:46:02 +00:00 |
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SIDebuggerInsertNops.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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SIDefines.h
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[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
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2017-06-21 08:53:38 +00:00 |
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SIFixControlFlowLiveIntervals.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIFixSGPRCopies.cpp
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[AMDGPU] Eliminate SGPR to VGPR copy when possible
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2017-06-20 18:32:42 +00:00 |
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SIFixVGPRCopies.cpp
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[AMDGPU] Add VGPR copies post regalloc fix pass
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2017-01-24 17:46:17 +00:00 |
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SIFoldOperands.cpp
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AMDGPU: Do operand folding in program order
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2017-06-20 18:56:32 +00:00 |
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SIFrameLowering.cpp
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AMDGPU: Setup SP/FP in callee function prolog/epilog
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2017-06-26 17:53:59 +00:00 |
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SIFrameLowering.h
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AMDGPU: Setup SP/FP in callee function prolog/epilog
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2017-06-26 17:53:59 +00:00 |
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SIInsertSkips.cpp
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AMDGPU: Rename SI_RETURN
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2017-03-21 22:18:10 +00:00 |
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SIInsertWaitcnts.cpp
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[AMDGPU] Fix uninit'ed var (RevisitLoop)
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2017-06-05 19:29:01 +00:00 |
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SIInsertWaits.cpp
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AMDGPU: Make auto waitcnt before barrier a feature
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2017-06-02 17:40:26 +00:00 |
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SIInstrFormats.td
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[AMDGPU][MC] Fixed bugs in export instruction
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2017-05-19 13:36:09 +00:00 |
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SIInstrInfo.cpp
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AMDGPU: M0 operands to spill/restore opcodes are dead
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2017-06-27 08:04:13 +00:00 |
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SIInstrInfo.h
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[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
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2017-06-21 08:53:38 +00:00 |
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SIInstrInfo.td
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[AMDGPU] Add intrinsics for tbuffer load and store
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2017-06-22 16:29:22 +00:00 |
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SIInstructions.td
|
Re-submit AMDGPUMachineCFGStructurizer.
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2017-05-15 20:18:37 +00:00 |
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SIIntrinsics.td
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AMDGPU: Remove legacy export intrinsic
|
2017-04-04 16:34:39 +00:00 |
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SIISelLowering.cpp
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AMDGPU: Whitespace fixes
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2017-06-26 03:01:36 +00:00 |
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SIISelLowering.h
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[AMDGPU] Combine add and adde, sub and sube
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2017-06-21 22:30:01 +00:00 |
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SILoadStoreOptimizer.cpp
|
[LegacyPassManager] Remove TargetMachine constructors
|
2017-05-18 17:21:13 +00:00 |
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SILowerControlFlow.cpp
|
Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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SILowerI1Copies.cpp
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU: Setup SP/FP in callee function prolog/epilog
|
2017-06-26 17:53:59 +00:00 |
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SIMachineFunctionInfo.h
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AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
|
2017-06-26 03:01:31 +00:00 |
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SIMachineScheduler.cpp
|
Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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SIMachineScheduler.h
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[AMDGPU] Update SI scheduler colorHighLatenciesGroups
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2017-03-28 07:19:48 +00:00 |
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SIOptimizeExecMasking.cpp
|
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
|
2016-10-07 08:40:14 +00:00 |
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SIPeepholeSDWA.cpp
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[AMDGPU] SDWA: add support for GFX9 in peephole pass
|
2017-06-22 06:26:41 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
|
2017-06-26 03:01:31 +00:00 |
|
SIRegisterInfo.h
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AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
|
2017-06-26 03:01:31 +00:00 |
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SIRegisterInfo.td
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AMDGPU: Fix not including v2i16/v2f16 in register class
|
2017-03-21 16:42:50 +00:00 |
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SISchedule.td
|
AMDGPU: Implement early ifcvt target hooks.
|
2017-01-25 04:25:02 +00:00 |
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SIShrinkInstructions.cpp
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[AMDGPU] Fix illegal shrink of V_SUBB_U32 and V_ADDC_U32
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2017-06-20 20:33:44 +00:00 |
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SITypeRewriter.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
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SIWholeQuadMode.cpp
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[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
|
2016-12-09 22:06:55 +00:00 |
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SMInstructions.td
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AMDGPUAnnotateUniformValue should always treat volatile loads as divergent
|
2017-06-02 15:25:52 +00:00 |
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SOPInstructions.td
|
Resubmit r303859 with test fixed.
|
2017-05-26 20:38:26 +00:00 |
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VIInstrFormats.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
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VIInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
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VOP1Instructions.td
|
[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
|
2017-06-21 08:53:38 +00:00 |
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VOP2Instructions.td
|
[AMDGPU] SDWA: remove support for VOP2 instructions that have only 64-bit encoding
|
2017-06-22 12:42:14 +00:00 |
|
VOP3Instructions.td
|
[AMDGPU] Add intrinsics for alignbit and alignbyte instructions
|
2017-06-09 19:03:00 +00:00 |
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VOP3PInstructions.td
|
AMDGPU: Support v2i16/v2f16 packed operations
|
2017-02-27 22:15:25 +00:00 |
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VOPCInstructions.td
|
[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
|
2017-06-21 08:53:38 +00:00 |
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VOPInstructions.td
|
[AMDGPU] SDWA: add support for GFX9 in peephole pass
|
2017-06-22 06:26:41 +00:00 |
0df653a65e