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8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
2.5 KiB
LLVM
60 lines
2.5 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare float @llvm.fma.f32(float, float, float) nounwind readnone
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declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
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declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
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; FUNC-LABEL: {{^}}fma_f32:
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; SI: v_fma_f32 {{v[0-9]+, v[0-9]+, v[0-9]+, v[0-9]+}}
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; EG: MEM_RAT_{{.*}} STORE_{{.*}} [[RES:T[0-9]\.[XYZW]]], {{T[0-9]\.[XYZW]}},
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; EG: FMA {{\*? *}}[[RES]]
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define void @fma_f32(float addrspace(1)* %out, float addrspace(1)* %in1,
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float addrspace(1)* %in2, float addrspace(1)* %in3) {
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%r0 = load float addrspace(1)* %in1
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%r1 = load float addrspace(1)* %in2
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%r2 = load float addrspace(1)* %in3
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%r3 = tail call float @llvm.fma.f32(float %r0, float %r1, float %r2)
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store float %r3, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_v2f32:
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; SI: v_fma_f32
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; SI: v_fma_f32
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; EG: MEM_RAT_{{.*}} STORE_{{.*}} [[RES:T[0-9]]].[[CHLO:[XYZW]]][[CHHI:[XYZW]]], {{T[0-9]\.[XYZW]}},
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; EG-DAG: FMA {{\*? *}}[[RES]].[[CHLO]]
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; EG-DAG: FMA {{\*? *}}[[RES]].[[CHHI]]
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define void @fma_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in1,
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<2 x float> addrspace(1)* %in2, <2 x float> addrspace(1)* %in3) {
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%r0 = load <2 x float> addrspace(1)* %in1
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%r1 = load <2 x float> addrspace(1)* %in2
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%r2 = load <2 x float> addrspace(1)* %in3
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%r3 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %r0, <2 x float> %r1, <2 x float> %r2)
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store <2 x float> %r3, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_v4f32:
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; SI: v_fma_f32
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; SI: v_fma_f32
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; SI: v_fma_f32
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; SI: v_fma_f32
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; EG: MEM_RAT_{{.*}} STORE_{{.*}} [[RES:T[0-9]]].{{[XYZW][XYZW][XYZW][XYZW]}}, {{T[0-9]\.[XYZW]}},
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; EG-DAG: FMA {{\*? *}}[[RES]].X
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; EG-DAG: FMA {{\*? *}}[[RES]].Y
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; EG-DAG: FMA {{\*? *}}[[RES]].Z
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; EG-DAG: FMA {{\*? *}}[[RES]].W
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define void @fma_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in1,
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<4 x float> addrspace(1)* %in2, <4 x float> addrspace(1)* %in3) {
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%r0 = load <4 x float> addrspace(1)* %in1
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%r1 = load <4 x float> addrspace(1)* %in2
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%r2 = load <4 x float> addrspace(1)* %in3
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%r3 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %r0, <4 x float> %r1, <4 x float> %r2)
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store <4 x float> %r3, <4 x float> addrspace(1)* %out
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ret void
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}
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