llvm/test/CodeGen
Diana Picus 11601c0bd3 [ARM] GlobalISel: Add reg bank mappings for stores
Same as the ones for loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296115 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 13:07:25 +00:00
..
AArch64 [Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack 2017-02-24 03:10:10 +00:00
AMDGPU Correct register pressure calculation in presence of subregs 2017-02-23 20:19:44 +00:00
ARM [ARM] GlobalISel: Add reg bank mappings for stores 2017-02-24 13:07:25 +00:00
AVR [AVR] Disable integrated assembler for a few tests 2017-02-22 22:41:13 +00:00
BPF
Generic
Hexagon [Hexagon] Handle saturations in Hexagon bit tracker 2017-02-23 22:11:52 +00:00
Inputs
Lanai
Mips
MIR
MSP430 Revert r269060 to pacify bots. 2017-02-24 01:22:19 +00:00
NVPTX [NVPTX] Added support for .f16x2 instructions. 2017-02-23 22:38:24 +00:00
PowerPC Revert r269060 to pacify bots. 2017-02-24 01:22:19 +00:00
SPARC
SystemZ
Thumb
Thumb2
WebAssembly
WinEH
X86 [AVX-512] Remove lzcnt intrinsics and autoupgrade them to generic ctlz intrinsics with select. 2017-02-24 05:35:04 +00:00
XCore