llvm/x86-64-tls-1.ll at 11a12c2c07f7e11c5fecc4f3a601a58f25e6a531 - llvm - Gitea: Git with a cup of tea

RPCSX/llvm

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Craig Topper b1ff87ec86 [X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead.

Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero.

Fixes PR23100.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234075 91177308-0d34-0410-b5e6-96231b3b80d8

2015-04-04 02:08:20 +00:00

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 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 @tm_nest_level = internal thread_local global i32 0
 define i64 @z() nounwind {
 ; CHECK:      movq    $tm_nest_level@TPOFF, %r[[R0:[abcd]]]x
 ; CHECK-NEXT: addl    %fs:0, %e[[R0]]x
 ; CHECK-NEXT: andl    $100, %e[[R0]]x
   ret i64 and (i64 ptrtoint (i32* @tm_nest_level to i64), i64 100)
 }