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8ae8a5ef79
Some architecture specific ELF section flags might have the same value (for example SHF_X86_64_LARGE and SHF_HEX_GPREL) and we have to check machine architectures to select an appropriate set of possible flags. The patch selects architecture specific flags into separate arrays `ElfxxxSectionFlags` and combines `ElfSectionFlags` and `ElfxxxSectionFlags` before pass to the `StreamWriter::printFlags()` method. Differential Revision: http://reviews.llvm.org/D16269 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258334 91177308-0d34-0410-b5e6-96231b3b80d8
829 lines
23 KiB
C++
829 lines
23 KiB
C++
//===- ELFYAML.cpp - ELF YAMLIO implementation ----------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines classes for handling the YAML representation of ELF.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Object/ELFYAML.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/MipsABIFlags.h"
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namespace llvm {
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ELFYAML::Section::~Section() {}
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namespace yaml {
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void
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ScalarEnumerationTraits<ELFYAML::ELF_ET>::enumeration(IO &IO,
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ELFYAML::ELF_ET &Value) {
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#define ECase(X) IO.enumCase(Value, #X, ELF::X);
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ECase(ET_NONE)
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ECase(ET_REL)
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ECase(ET_EXEC)
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ECase(ET_DYN)
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ECase(ET_CORE)
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#undef ECase
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IO.enumFallback<Hex16>(Value);
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}
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void
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ScalarEnumerationTraits<ELFYAML::ELF_EM>::enumeration(IO &IO,
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ELFYAML::ELF_EM &Value) {
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#define ECase(X) IO.enumCase(Value, #X, ELF::X);
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ECase(EM_NONE)
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ECase(EM_M32)
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ECase(EM_SPARC)
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ECase(EM_386)
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ECase(EM_68K)
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ECase(EM_88K)
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ECase(EM_IAMCU)
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ECase(EM_860)
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ECase(EM_MIPS)
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ECase(EM_S370)
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ECase(EM_MIPS_RS3_LE)
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ECase(EM_PARISC)
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ECase(EM_VPP500)
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ECase(EM_SPARC32PLUS)
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ECase(EM_960)
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ECase(EM_PPC)
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ECase(EM_PPC64)
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ECase(EM_S390)
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ECase(EM_SPU)
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ECase(EM_V800)
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ECase(EM_FR20)
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ECase(EM_RH32)
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ECase(EM_RCE)
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ECase(EM_ARM)
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ECase(EM_ALPHA)
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ECase(EM_SH)
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ECase(EM_SPARCV9)
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ECase(EM_TRICORE)
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ECase(EM_ARC)
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ECase(EM_H8_300)
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ECase(EM_H8_300H)
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ECase(EM_H8S)
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ECase(EM_H8_500)
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ECase(EM_IA_64)
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ECase(EM_MIPS_X)
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ECase(EM_COLDFIRE)
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ECase(EM_68HC12)
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ECase(EM_MMA)
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ECase(EM_PCP)
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ECase(EM_NCPU)
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ECase(EM_NDR1)
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ECase(EM_STARCORE)
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ECase(EM_ME16)
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ECase(EM_ST100)
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ECase(EM_TINYJ)
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ECase(EM_X86_64)
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ECase(EM_PDSP)
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ECase(EM_PDP10)
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ECase(EM_PDP11)
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ECase(EM_FX66)
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ECase(EM_ST9PLUS)
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ECase(EM_ST7)
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ECase(EM_68HC16)
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ECase(EM_68HC11)
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ECase(EM_68HC08)
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ECase(EM_68HC05)
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ECase(EM_SVX)
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ECase(EM_ST19)
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ECase(EM_VAX)
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ECase(EM_CRIS)
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ECase(EM_JAVELIN)
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ECase(EM_FIREPATH)
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ECase(EM_ZSP)
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ECase(EM_MMIX)
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ECase(EM_HUANY)
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ECase(EM_PRISM)
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ECase(EM_AVR)
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ECase(EM_FR30)
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ECase(EM_D10V)
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ECase(EM_D30V)
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ECase(EM_V850)
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ECase(EM_M32R)
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ECase(EM_MN10300)
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ECase(EM_MN10200)
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ECase(EM_PJ)
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ECase(EM_OPENRISC)
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ECase(EM_ARC_COMPACT)
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ECase(EM_XTENSA)
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ECase(EM_VIDEOCORE)
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ECase(EM_TMM_GPP)
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ECase(EM_NS32K)
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ECase(EM_TPC)
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ECase(EM_SNP1K)
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ECase(EM_ST200)
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ECase(EM_IP2K)
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ECase(EM_MAX)
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ECase(EM_CR)
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ECase(EM_F2MC16)
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ECase(EM_MSP430)
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ECase(EM_BLACKFIN)
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ECase(EM_SE_C33)
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ECase(EM_SEP)
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ECase(EM_ARCA)
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ECase(EM_UNICORE)
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ECase(EM_EXCESS)
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ECase(EM_DXP)
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ECase(EM_ALTERA_NIOS2)
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ECase(EM_CRX)
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ECase(EM_XGATE)
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ECase(EM_C166)
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ECase(EM_M16C)
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ECase(EM_DSPIC30F)
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ECase(EM_CE)
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ECase(EM_M32C)
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ECase(EM_TSK3000)
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ECase(EM_RS08)
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ECase(EM_SHARC)
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ECase(EM_ECOG2)
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ECase(EM_SCORE7)
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ECase(EM_DSP24)
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ECase(EM_VIDEOCORE3)
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ECase(EM_LATTICEMICO32)
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ECase(EM_SE_C17)
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ECase(EM_TI_C6000)
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ECase(EM_TI_C2000)
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ECase(EM_TI_C5500)
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ECase(EM_MMDSP_PLUS)
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ECase(EM_CYPRESS_M8C)
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ECase(EM_R32C)
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ECase(EM_TRIMEDIA)
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ECase(EM_HEXAGON)
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ECase(EM_8051)
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ECase(EM_STXP7X)
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ECase(EM_NDS32)
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ECase(EM_ECOG1)
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ECase(EM_ECOG1X)
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ECase(EM_MAXQ30)
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ECase(EM_XIMO16)
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ECase(EM_MANIK)
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ECase(EM_CRAYNV2)
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ECase(EM_RX)
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ECase(EM_METAG)
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ECase(EM_MCST_ELBRUS)
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ECase(EM_ECOG16)
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ECase(EM_CR16)
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ECase(EM_ETPU)
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ECase(EM_SLE9X)
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ECase(EM_L10M)
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ECase(EM_K10M)
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ECase(EM_AARCH64)
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ECase(EM_AVR32)
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ECase(EM_STM8)
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ECase(EM_TILE64)
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ECase(EM_TILEPRO)
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ECase(EM_CUDA)
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ECase(EM_TILEGX)
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ECase(EM_CLOUDSHIELD)
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ECase(EM_COREA_1ST)
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ECase(EM_COREA_2ND)
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ECase(EM_ARC_COMPACT2)
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ECase(EM_OPEN8)
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ECase(EM_RL78)
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ECase(EM_VIDEOCORE5)
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ECase(EM_78KOR)
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ECase(EM_56800EX)
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ECase(EM_AMDGPU)
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#undef ECase
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}
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void ScalarEnumerationTraits<ELFYAML::ELF_ELFCLASS>::enumeration(
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IO &IO, ELFYAML::ELF_ELFCLASS &Value) {
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#define ECase(X) IO.enumCase(Value, #X, ELF::X);
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// Since the semantics of ELFCLASSNONE is "invalid", just don't accept it
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// here.
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ECase(ELFCLASS32)
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ECase(ELFCLASS64)
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#undef ECase
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}
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void ScalarEnumerationTraits<ELFYAML::ELF_ELFDATA>::enumeration(
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IO &IO, ELFYAML::ELF_ELFDATA &Value) {
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#define ECase(X) IO.enumCase(Value, #X, ELF::X);
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// Since the semantics of ELFDATANONE is "invalid", just don't accept it
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// here.
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ECase(ELFDATA2LSB)
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ECase(ELFDATA2MSB)
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#undef ECase
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}
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void ScalarEnumerationTraits<ELFYAML::ELF_ELFOSABI>::enumeration(
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IO &IO, ELFYAML::ELF_ELFOSABI &Value) {
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#define ECase(X) IO.enumCase(Value, #X, ELF::X);
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ECase(ELFOSABI_NONE)
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ECase(ELFOSABI_HPUX)
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ECase(ELFOSABI_NETBSD)
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ECase(ELFOSABI_GNU)
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ECase(ELFOSABI_GNU)
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ECase(ELFOSABI_HURD)
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ECase(ELFOSABI_SOLARIS)
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ECase(ELFOSABI_AIX)
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ECase(ELFOSABI_IRIX)
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ECase(ELFOSABI_FREEBSD)
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ECase(ELFOSABI_TRU64)
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ECase(ELFOSABI_MODESTO)
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ECase(ELFOSABI_OPENBSD)
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ECase(ELFOSABI_OPENVMS)
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ECase(ELFOSABI_NSK)
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ECase(ELFOSABI_AROS)
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ECase(ELFOSABI_FENIXOS)
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ECase(ELFOSABI_CLOUDABI)
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ECase(ELFOSABI_C6000_ELFABI)
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ECase(ELFOSABI_C6000_LINUX)
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ECase(ELFOSABI_ARM)
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ECase(ELFOSABI_STANDALONE)
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#undef ECase
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}
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void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
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ELFYAML::ELF_EF &Value) {
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const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
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assert(Object && "The IO context is not initialized");
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#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
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#define BCaseMask(X, M) IO.maskedBitSetCase(Value, #X, ELF::X, ELF::M);
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switch (Object->Header.Machine) {
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case ELF::EM_ARM:
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BCase(EF_ARM_SOFT_FLOAT)
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BCase(EF_ARM_VFP_FLOAT)
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BCaseMask(EF_ARM_EABI_UNKNOWN, EF_ARM_EABIMASK)
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BCaseMask(EF_ARM_EABI_VER1, EF_ARM_EABIMASK)
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BCaseMask(EF_ARM_EABI_VER2, EF_ARM_EABIMASK)
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BCaseMask(EF_ARM_EABI_VER3, EF_ARM_EABIMASK)
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BCaseMask(EF_ARM_EABI_VER4, EF_ARM_EABIMASK)
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BCaseMask(EF_ARM_EABI_VER5, EF_ARM_EABIMASK)
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break;
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case ELF::EM_MIPS:
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BCase(EF_MIPS_NOREORDER)
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BCase(EF_MIPS_PIC)
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BCase(EF_MIPS_CPIC)
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BCase(EF_MIPS_ABI2)
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BCase(EF_MIPS_32BITMODE)
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BCase(EF_MIPS_FP64)
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BCase(EF_MIPS_NAN2008)
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BCase(EF_MIPS_MICROMIPS)
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BCase(EF_MIPS_ARCH_ASE_M16)
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BCase(EF_MIPS_ARCH_ASE_MDMX)
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BCaseMask(EF_MIPS_ABI_O32, EF_MIPS_ABI)
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BCaseMask(EF_MIPS_ABI_O64, EF_MIPS_ABI)
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BCaseMask(EF_MIPS_ABI_EABI32, EF_MIPS_ABI)
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BCaseMask(EF_MIPS_ABI_EABI64, EF_MIPS_ABI)
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BCaseMask(EF_MIPS_MACH_3900, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_4010, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_4100, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_4650, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_4120, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_4111, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_SB1, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_OCTEON, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_XLR, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_OCTEON2, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_OCTEON3, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_5400, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_5900, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_5500, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_9000, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_LS2E, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_LS2F, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_MACH_LS3A, EF_MIPS_MACH)
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BCaseMask(EF_MIPS_ARCH_1, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_2, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_3, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_4, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_5, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_32, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_64, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_32R2, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_64R2, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_32R6, EF_MIPS_ARCH)
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BCaseMask(EF_MIPS_ARCH_64R6, EF_MIPS_ARCH)
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break;
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case ELF::EM_HEXAGON:
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BCase(EF_HEXAGON_MACH_V2)
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BCase(EF_HEXAGON_MACH_V3)
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BCase(EF_HEXAGON_MACH_V4)
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BCase(EF_HEXAGON_MACH_V5)
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BCase(EF_HEXAGON_ISA_V2)
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BCase(EF_HEXAGON_ISA_V3)
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BCase(EF_HEXAGON_ISA_V4)
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BCase(EF_HEXAGON_ISA_V5)
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break;
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case ELF::EM_AVR:
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BCase(EF_AVR_ARCH_AVR1)
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BCase(EF_AVR_ARCH_AVR2)
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BCase(EF_AVR_ARCH_AVR25)
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BCase(EF_AVR_ARCH_AVR3)
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BCase(EF_AVR_ARCH_AVR31)
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BCase(EF_AVR_ARCH_AVR35)
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BCase(EF_AVR_ARCH_AVR4)
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BCase(EF_AVR_ARCH_AVR51)
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BCase(EF_AVR_ARCH_AVR6)
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BCase(EF_AVR_ARCH_AVRTINY)
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BCase(EF_AVR_ARCH_XMEGA1)
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BCase(EF_AVR_ARCH_XMEGA2)
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BCase(EF_AVR_ARCH_XMEGA3)
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BCase(EF_AVR_ARCH_XMEGA4)
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BCase(EF_AVR_ARCH_XMEGA5)
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BCase(EF_AVR_ARCH_XMEGA6)
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BCase(EF_AVR_ARCH_XMEGA7)
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break;
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case ELF::EM_AMDGPU:
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case ELF::EM_X86_64:
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break;
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default:
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llvm_unreachable("Unsupported architecture");
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}
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#undef BCase
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#undef BCaseMask
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}
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void ScalarEnumerationTraits<ELFYAML::ELF_SHT>::enumeration(
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IO &IO, ELFYAML::ELF_SHT &Value) {
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const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
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assert(Object && "The IO context is not initialized");
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#define ECase(X) IO.enumCase(Value, #X, ELF::X);
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ECase(SHT_NULL)
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ECase(SHT_PROGBITS)
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// No SHT_SYMTAB. Use the top-level `Symbols` key instead.
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// FIXME: Issue a diagnostic with this information.
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ECase(SHT_STRTAB)
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ECase(SHT_RELA)
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ECase(SHT_HASH)
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ECase(SHT_DYNAMIC)
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ECase(SHT_NOTE)
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ECase(SHT_NOBITS)
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ECase(SHT_REL)
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ECase(SHT_SHLIB)
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ECase(SHT_DYNSYM)
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ECase(SHT_INIT_ARRAY)
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ECase(SHT_FINI_ARRAY)
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ECase(SHT_PREINIT_ARRAY)
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ECase(SHT_GROUP)
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ECase(SHT_SYMTAB_SHNDX)
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ECase(SHT_LOOS)
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ECase(SHT_GNU_ATTRIBUTES)
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ECase(SHT_GNU_HASH)
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ECase(SHT_GNU_verdef)
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ECase(SHT_GNU_verneed)
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ECase(SHT_GNU_versym)
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ECase(SHT_HIOS)
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ECase(SHT_LOPROC)
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switch (Object->Header.Machine) {
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case ELF::EM_ARM:
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ECase(SHT_ARM_EXIDX)
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ECase(SHT_ARM_PREEMPTMAP)
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ECase(SHT_ARM_ATTRIBUTES)
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ECase(SHT_ARM_DEBUGOVERLAY)
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ECase(SHT_ARM_OVERLAYSECTION)
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break;
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case ELF::EM_HEXAGON:
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ECase(SHT_HEX_ORDERED)
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break;
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case ELF::EM_X86_64:
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ECase(SHT_X86_64_UNWIND)
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break;
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case ELF::EM_MIPS:
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ECase(SHT_MIPS_REGINFO)
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ECase(SHT_MIPS_OPTIONS)
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ECase(SHT_MIPS_ABIFLAGS)
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break;
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default:
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// Nothing to do.
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break;
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}
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#undef ECase
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}
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void ScalarBitSetTraits<ELFYAML::ELF_SHF>::bitset(IO &IO,
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ELFYAML::ELF_SHF &Value) {
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const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
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#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
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BCase(SHF_WRITE)
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BCase(SHF_ALLOC)
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BCase(SHF_EXCLUDE)
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BCase(SHF_EXECINSTR)
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BCase(SHF_MERGE)
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BCase(SHF_STRINGS)
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BCase(SHF_INFO_LINK)
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BCase(SHF_LINK_ORDER)
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BCase(SHF_OS_NONCONFORMING)
|
|
BCase(SHF_GROUP)
|
|
BCase(SHF_TLS)
|
|
switch(Object->Header.Machine) {
|
|
case ELF::EM_AMDGPU:
|
|
BCase(SHF_AMDGPU_HSA_GLOBAL)
|
|
BCase(SHF_AMDGPU_HSA_READONLY)
|
|
BCase(SHF_AMDGPU_HSA_CODE)
|
|
BCase(SHF_AMDGPU_HSA_AGENT)
|
|
break;
|
|
case ELF::EM_HEXAGON:
|
|
BCase(SHF_HEX_GPREL)
|
|
break;
|
|
case ELF::EM_MIPS:
|
|
BCase(SHF_MIPS_NODUPES)
|
|
BCase(SHF_MIPS_NAMES)
|
|
BCase(SHF_MIPS_LOCAL)
|
|
BCase(SHF_MIPS_NOSTRIP)
|
|
BCase(SHF_MIPS_GPREL)
|
|
BCase(SHF_MIPS_MERGE)
|
|
BCase(SHF_MIPS_ADDR)
|
|
BCase(SHF_MIPS_STRING)
|
|
break;
|
|
case ELF::EM_X86_64:
|
|
BCase(SHF_X86_64_LARGE)
|
|
break;
|
|
default:
|
|
// Nothing to do.
|
|
break;
|
|
}
|
|
#undef BCase
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::ELF_STT>::enumeration(
|
|
IO &IO, ELFYAML::ELF_STT &Value) {
|
|
#define ECase(X) IO.enumCase(Value, #X, ELF::X);
|
|
ECase(STT_NOTYPE)
|
|
ECase(STT_OBJECT)
|
|
ECase(STT_FUNC)
|
|
ECase(STT_SECTION)
|
|
ECase(STT_FILE)
|
|
ECase(STT_COMMON)
|
|
ECase(STT_TLS)
|
|
ECase(STT_GNU_IFUNC)
|
|
#undef ECase
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::ELF_STV>::enumeration(
|
|
IO &IO, ELFYAML::ELF_STV &Value) {
|
|
#define ECase(X) IO.enumCase(Value, #X, ELF::X);
|
|
ECase(STV_DEFAULT)
|
|
ECase(STV_INTERNAL)
|
|
ECase(STV_HIDDEN)
|
|
ECase(STV_PROTECTED)
|
|
#undef ECase
|
|
}
|
|
|
|
void ScalarBitSetTraits<ELFYAML::ELF_STO>::bitset(IO &IO,
|
|
ELFYAML::ELF_STO &Value) {
|
|
const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
|
|
assert(Object && "The IO context is not initialized");
|
|
#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
|
|
switch (Object->Header.Machine) {
|
|
case ELF::EM_MIPS:
|
|
BCase(STO_MIPS_OPTIONAL)
|
|
BCase(STO_MIPS_PLT)
|
|
BCase(STO_MIPS_PIC)
|
|
BCase(STO_MIPS_MICROMIPS)
|
|
break;
|
|
default:
|
|
break; // Nothing to do
|
|
}
|
|
#undef BCase
|
|
#undef BCaseMask
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::ELF_RSS>::enumeration(
|
|
IO &IO, ELFYAML::ELF_RSS &Value) {
|
|
#define ECase(X) IO.enumCase(Value, #X, ELF::X);
|
|
ECase(RSS_UNDEF)
|
|
ECase(RSS_GP)
|
|
ECase(RSS_GP0)
|
|
ECase(RSS_LOC)
|
|
#undef ECase
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::ELF_REL>::enumeration(
|
|
IO &IO, ELFYAML::ELF_REL &Value) {
|
|
const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
|
|
assert(Object && "The IO context is not initialized");
|
|
#define ELF_RELOC(X, Y) IO.enumCase(Value, #X, ELF::X);
|
|
switch (Object->Header.Machine) {
|
|
case ELF::EM_X86_64:
|
|
#include "llvm/Support/ELFRelocs/x86_64.def"
|
|
break;
|
|
case ELF::EM_MIPS:
|
|
#include "llvm/Support/ELFRelocs/Mips.def"
|
|
break;
|
|
case ELF::EM_HEXAGON:
|
|
#include "llvm/Support/ELFRelocs/Hexagon.def"
|
|
break;
|
|
case ELF::EM_386:
|
|
case ELF::EM_IAMCU:
|
|
#include "llvm/Support/ELFRelocs/i386.def"
|
|
break;
|
|
case ELF::EM_AARCH64:
|
|
#include "llvm/Support/ELFRelocs/AArch64.def"
|
|
break;
|
|
case ELF::EM_ARM:
|
|
#include "llvm/Support/ELFRelocs/ARM.def"
|
|
break;
|
|
default:
|
|
llvm_unreachable("Unsupported architecture");
|
|
}
|
|
#undef ELF_RELOC
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_REG>::enumeration(
|
|
IO &IO, ELFYAML::MIPS_AFL_REG &Value) {
|
|
#define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X);
|
|
ECase(REG_NONE)
|
|
ECase(REG_32)
|
|
ECase(REG_64)
|
|
ECase(REG_128)
|
|
#undef ECase
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::MIPS_ABI_FP>::enumeration(
|
|
IO &IO, ELFYAML::MIPS_ABI_FP &Value) {
|
|
#define ECase(X) IO.enumCase(Value, #X, Mips::Val_GNU_MIPS_ABI_##X);
|
|
ECase(FP_ANY)
|
|
ECase(FP_DOUBLE)
|
|
ECase(FP_SINGLE)
|
|
ECase(FP_SOFT)
|
|
ECase(FP_OLD_64)
|
|
ECase(FP_XX)
|
|
ECase(FP_64)
|
|
ECase(FP_64A)
|
|
#undef ECase
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_EXT>::enumeration(
|
|
IO &IO, ELFYAML::MIPS_AFL_EXT &Value) {
|
|
#define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X);
|
|
ECase(EXT_NONE)
|
|
ECase(EXT_XLR)
|
|
ECase(EXT_OCTEON2)
|
|
ECase(EXT_OCTEONP)
|
|
ECase(EXT_LOONGSON_3A)
|
|
ECase(EXT_OCTEON)
|
|
ECase(EXT_5900)
|
|
ECase(EXT_4650)
|
|
ECase(EXT_4010)
|
|
ECase(EXT_4100)
|
|
ECase(EXT_3900)
|
|
ECase(EXT_10000)
|
|
ECase(EXT_SB1)
|
|
ECase(EXT_4111)
|
|
ECase(EXT_4120)
|
|
ECase(EXT_5400)
|
|
ECase(EXT_5500)
|
|
ECase(EXT_LOONGSON_2E)
|
|
ECase(EXT_LOONGSON_2F)
|
|
ECase(EXT_OCTEON3)
|
|
#undef ECase
|
|
}
|
|
|
|
void ScalarEnumerationTraits<ELFYAML::MIPS_ISA>::enumeration(
|
|
IO &IO, ELFYAML::MIPS_ISA &Value) {
|
|
IO.enumCase(Value, "MIPS1", 1);
|
|
IO.enumCase(Value, "MIPS2", 2);
|
|
IO.enumCase(Value, "MIPS3", 3);
|
|
IO.enumCase(Value, "MIPS4", 4);
|
|
IO.enumCase(Value, "MIPS5", 5);
|
|
IO.enumCase(Value, "MIPS32", 32);
|
|
IO.enumCase(Value, "MIPS64", 64);
|
|
}
|
|
|
|
void ScalarBitSetTraits<ELFYAML::MIPS_AFL_ASE>::bitset(
|
|
IO &IO, ELFYAML::MIPS_AFL_ASE &Value) {
|
|
#define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_ASE_##X);
|
|
BCase(DSP)
|
|
BCase(DSPR2)
|
|
BCase(EVA)
|
|
BCase(MCU)
|
|
BCase(MDMX)
|
|
BCase(MIPS3D)
|
|
BCase(MT)
|
|
BCase(SMARTMIPS)
|
|
BCase(VIRT)
|
|
BCase(MSA)
|
|
BCase(MIPS16)
|
|
BCase(MICROMIPS)
|
|
BCase(XPA)
|
|
#undef BCase
|
|
}
|
|
|
|
void ScalarBitSetTraits<ELFYAML::MIPS_AFL_FLAGS1>::bitset(
|
|
IO &IO, ELFYAML::MIPS_AFL_FLAGS1 &Value) {
|
|
#define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_FLAGS1_##X);
|
|
BCase(ODDSPREG)
|
|
#undef BCase
|
|
}
|
|
|
|
void MappingTraits<ELFYAML::FileHeader>::mapping(IO &IO,
|
|
ELFYAML::FileHeader &FileHdr) {
|
|
IO.mapRequired("Class", FileHdr.Class);
|
|
IO.mapRequired("Data", FileHdr.Data);
|
|
IO.mapOptional("OSABI", FileHdr.OSABI, ELFYAML::ELF_ELFOSABI(0));
|
|
IO.mapRequired("Type", FileHdr.Type);
|
|
IO.mapRequired("Machine", FileHdr.Machine);
|
|
IO.mapOptional("Flags", FileHdr.Flags, ELFYAML::ELF_EF(0));
|
|
IO.mapOptional("Entry", FileHdr.Entry, Hex64(0));
|
|
}
|
|
|
|
namespace {
|
|
struct NormalizedOther {
|
|
NormalizedOther(IO &)
|
|
: Visibility(ELFYAML::ELF_STV(0)), Other(ELFYAML::ELF_STO(0)) {}
|
|
NormalizedOther(IO &, uint8_t Original)
|
|
: Visibility(Original & 0x3), Other(Original & ~0x3) {}
|
|
|
|
uint8_t denormalize(IO &) { return Visibility | Other; }
|
|
|
|
ELFYAML::ELF_STV Visibility;
|
|
ELFYAML::ELF_STO Other;
|
|
};
|
|
}
|
|
|
|
void MappingTraits<ELFYAML::Symbol>::mapping(IO &IO, ELFYAML::Symbol &Symbol) {
|
|
IO.mapOptional("Name", Symbol.Name, StringRef());
|
|
IO.mapOptional("Type", Symbol.Type, ELFYAML::ELF_STT(0));
|
|
IO.mapOptional("Section", Symbol.Section, StringRef());
|
|
IO.mapOptional("Value", Symbol.Value, Hex64(0));
|
|
IO.mapOptional("Size", Symbol.Size, Hex64(0));
|
|
|
|
MappingNormalization<NormalizedOther, uint8_t> Keys(IO, Symbol.Other);
|
|
IO.mapOptional("Visibility", Keys->Visibility, ELFYAML::ELF_STV(0));
|
|
IO.mapOptional("Other", Keys->Other, ELFYAML::ELF_STO(0));
|
|
}
|
|
|
|
void MappingTraits<ELFYAML::LocalGlobalWeakSymbols>::mapping(
|
|
IO &IO, ELFYAML::LocalGlobalWeakSymbols &Symbols) {
|
|
IO.mapOptional("Local", Symbols.Local);
|
|
IO.mapOptional("Global", Symbols.Global);
|
|
IO.mapOptional("Weak", Symbols.Weak);
|
|
}
|
|
|
|
static void commonSectionMapping(IO &IO, ELFYAML::Section &Section) {
|
|
IO.mapOptional("Name", Section.Name, StringRef());
|
|
IO.mapRequired("Type", Section.Type);
|
|
IO.mapOptional("Flags", Section.Flags, ELFYAML::ELF_SHF(0));
|
|
IO.mapOptional("Address", Section.Address, Hex64(0));
|
|
IO.mapOptional("Link", Section.Link, StringRef());
|
|
IO.mapOptional("AddressAlign", Section.AddressAlign, Hex64(0));
|
|
IO.mapOptional("Info", Section.Info, StringRef());
|
|
}
|
|
|
|
static void sectionMapping(IO &IO, ELFYAML::RawContentSection &Section) {
|
|
commonSectionMapping(IO, Section);
|
|
IO.mapOptional("Content", Section.Content);
|
|
IO.mapOptional("Size", Section.Size, Hex64(Section.Content.binary_size()));
|
|
}
|
|
|
|
static void sectionMapping(IO &IO, ELFYAML::NoBitsSection &Section) {
|
|
commonSectionMapping(IO, Section);
|
|
IO.mapOptional("Size", Section.Size, Hex64(0));
|
|
}
|
|
|
|
static void sectionMapping(IO &IO, ELFYAML::RelocationSection &Section) {
|
|
commonSectionMapping(IO, Section);
|
|
IO.mapOptional("Relocations", Section.Relocations);
|
|
}
|
|
|
|
static void groupSectionMapping(IO &IO, ELFYAML::Group &group) {
|
|
commonSectionMapping(IO, group);
|
|
IO.mapRequired("Members", group.Members);
|
|
}
|
|
|
|
void MappingTraits<ELFYAML::SectionOrType>::mapping(
|
|
IO &IO, ELFYAML::SectionOrType §ionOrType) {
|
|
IO.mapRequired("SectionOrType", sectionOrType.sectionNameOrType);
|
|
}
|
|
|
|
static void sectionMapping(IO &IO, ELFYAML::MipsABIFlags &Section) {
|
|
commonSectionMapping(IO, Section);
|
|
IO.mapOptional("Version", Section.Version, Hex16(0));
|
|
IO.mapRequired("ISA", Section.ISALevel);
|
|
IO.mapOptional("ISARevision", Section.ISARevision, Hex8(0));
|
|
IO.mapOptional("ISAExtension", Section.ISAExtension,
|
|
ELFYAML::MIPS_AFL_EXT(Mips::AFL_EXT_NONE));
|
|
IO.mapOptional("ASEs", Section.ASEs, ELFYAML::MIPS_AFL_ASE(0));
|
|
IO.mapOptional("FpABI", Section.FpABI,
|
|
ELFYAML::MIPS_ABI_FP(Mips::Val_GNU_MIPS_ABI_FP_ANY));
|
|
IO.mapOptional("GPRSize", Section.GPRSize,
|
|
ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE));
|
|
IO.mapOptional("CPR1Size", Section.CPR1Size,
|
|
ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE));
|
|
IO.mapOptional("CPR2Size", Section.CPR2Size,
|
|
ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE));
|
|
IO.mapOptional("Flags1", Section.Flags1, ELFYAML::MIPS_AFL_FLAGS1(0));
|
|
IO.mapOptional("Flags2", Section.Flags2, Hex32(0));
|
|
}
|
|
|
|
void MappingTraits<std::unique_ptr<ELFYAML::Section>>::mapping(
|
|
IO &IO, std::unique_ptr<ELFYAML::Section> &Section) {
|
|
ELFYAML::ELF_SHT sectionType;
|
|
if (IO.outputting())
|
|
sectionType = Section->Type;
|
|
else
|
|
IO.mapRequired("Type", sectionType);
|
|
|
|
switch (sectionType) {
|
|
case ELF::SHT_REL:
|
|
case ELF::SHT_RELA:
|
|
if (!IO.outputting())
|
|
Section.reset(new ELFYAML::RelocationSection());
|
|
sectionMapping(IO, *cast<ELFYAML::RelocationSection>(Section.get()));
|
|
break;
|
|
case ELF::SHT_GROUP:
|
|
if (!IO.outputting())
|
|
Section.reset(new ELFYAML::Group());
|
|
groupSectionMapping(IO, *cast<ELFYAML::Group>(Section.get()));
|
|
break;
|
|
case ELF::SHT_NOBITS:
|
|
if (!IO.outputting())
|
|
Section.reset(new ELFYAML::NoBitsSection());
|
|
sectionMapping(IO, *cast<ELFYAML::NoBitsSection>(Section.get()));
|
|
break;
|
|
case ELF::SHT_MIPS_ABIFLAGS:
|
|
if (!IO.outputting())
|
|
Section.reset(new ELFYAML::MipsABIFlags());
|
|
sectionMapping(IO, *cast<ELFYAML::MipsABIFlags>(Section.get()));
|
|
break;
|
|
default:
|
|
if (!IO.outputting())
|
|
Section.reset(new ELFYAML::RawContentSection());
|
|
sectionMapping(IO, *cast<ELFYAML::RawContentSection>(Section.get()));
|
|
}
|
|
}
|
|
|
|
StringRef MappingTraits<std::unique_ptr<ELFYAML::Section>>::validate(
|
|
IO &io, std::unique_ptr<ELFYAML::Section> &Section) {
|
|
const auto *RawSection = dyn_cast<ELFYAML::RawContentSection>(Section.get());
|
|
if (!RawSection || RawSection->Size >= RawSection->Content.binary_size())
|
|
return StringRef();
|
|
return "Section size must be greater or equal to the content size";
|
|
}
|
|
|
|
namespace {
|
|
struct NormalizedMips64RelType {
|
|
NormalizedMips64RelType(IO &)
|
|
: Type(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)),
|
|
Type2(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)),
|
|
Type3(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)),
|
|
SpecSym(ELFYAML::ELF_REL(ELF::RSS_UNDEF)) {}
|
|
NormalizedMips64RelType(IO &, ELFYAML::ELF_REL Original)
|
|
: Type(Original & 0xFF), Type2(Original >> 8 & 0xFF),
|
|
Type3(Original >> 16 & 0xFF), SpecSym(Original >> 24 & 0xFF) {}
|
|
|
|
ELFYAML::ELF_REL denormalize(IO &) {
|
|
ELFYAML::ELF_REL Res = Type | Type2 << 8 | Type3 << 16 | SpecSym << 24;
|
|
return Res;
|
|
}
|
|
|
|
ELFYAML::ELF_REL Type;
|
|
ELFYAML::ELF_REL Type2;
|
|
ELFYAML::ELF_REL Type3;
|
|
ELFYAML::ELF_RSS SpecSym;
|
|
};
|
|
}
|
|
|
|
void MappingTraits<ELFYAML::Relocation>::mapping(IO &IO,
|
|
ELFYAML::Relocation &Rel) {
|
|
const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
|
|
assert(Object && "The IO context is not initialized");
|
|
|
|
IO.mapRequired("Offset", Rel.Offset);
|
|
IO.mapRequired("Symbol", Rel.Symbol);
|
|
|
|
if (Object->Header.Machine == ELFYAML::ELF_EM(ELF::EM_MIPS) &&
|
|
Object->Header.Class == ELFYAML::ELF_ELFCLASS(ELF::ELFCLASS64)) {
|
|
MappingNormalization<NormalizedMips64RelType, ELFYAML::ELF_REL> Key(
|
|
IO, Rel.Type);
|
|
IO.mapRequired("Type", Key->Type);
|
|
IO.mapOptional("Type2", Key->Type2, ELFYAML::ELF_REL(ELF::R_MIPS_NONE));
|
|
IO.mapOptional("Type3", Key->Type3, ELFYAML::ELF_REL(ELF::R_MIPS_NONE));
|
|
IO.mapOptional("SpecSym", Key->SpecSym, ELFYAML::ELF_RSS(ELF::RSS_UNDEF));
|
|
} else
|
|
IO.mapRequired("Type", Rel.Type);
|
|
|
|
IO.mapOptional("Addend", Rel.Addend, (int64_t)0);
|
|
}
|
|
|
|
void MappingTraits<ELFYAML::Object>::mapping(IO &IO, ELFYAML::Object &Object) {
|
|
assert(!IO.getContext() && "The IO context is initialized already");
|
|
IO.setContext(&Object);
|
|
IO.mapRequired("FileHeader", Object.Header);
|
|
IO.mapOptional("Sections", Object.Sections);
|
|
IO.mapOptional("Symbols", Object.Symbols);
|
|
IO.setContext(nullptr);
|
|
}
|
|
|
|
LLVM_YAML_STRONG_TYPEDEF(uint8_t, MIPS_AFL_REG)
|
|
LLVM_YAML_STRONG_TYPEDEF(uint8_t, MIPS_ABI_FP)
|
|
LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_EXT)
|
|
LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_ASE)
|
|
LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_FLAGS1)
|
|
|
|
} // end namespace yaml
|
|
} // end namespace llvm
|