mirror of
https://github.com/RPCSX/llvm.git
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8aca90e5b6
Summary: This change moves creating calls to `llvm.uadd.with.overflow` from InstCombine to CodeGenPrep. Combining overflow check patterns into calls to the said intrinsic in InstCombine inhibits optimization because it introduces an intrinsic call that not all other transforms and analyses understand. Depends on D8888. Reviewers: majnemer, atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8889 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234638 91177308-0d34-0410-b5e6-96231b3b80d8
123 lines
3.1 KiB
LLVM
123 lines
3.1 KiB
LLVM
; RUN: opt -S -instcombine < %s | FileCheck %s
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; <rdar://problem/8558713>
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declare void @throwAnExceptionOrWhatever()
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; CHECK-LABEL: @test1(
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define i32 @test1(i32 %a, i32 %b) nounwind ssp {
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entry:
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; CHECK-NOT: sext
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%conv = sext i32 %a to i64
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%conv2 = sext i32 %b to i64
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%add = add nsw i64 %conv2, %conv
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%add.off = add i64 %add, 2147483648
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; CHECK: llvm.sadd.with.overflow.i32
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%0 = icmp ugt i64 %add.off, 4294967295
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br i1 %0, label %if.then, label %if.end
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if.then:
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tail call void @throwAnExceptionOrWhatever() nounwind
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br label %if.end
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if.end:
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; CHECK-NOT: trunc
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%conv9 = trunc i64 %add to i32
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; CHECK: ret i32
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ret i32 %conv9
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}
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; CHECK-LABEL: @test2(
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; This form should not be promoted for two reasons: 1) it is unprofitable to
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; promote it since the add.off instruction has another use, and 2) it is unsafe
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; because the add-with-off makes the high bits of the original add live.
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define i32 @test2(i32 %a, i32 %b, i64* %P) nounwind ssp {
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entry:
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%conv = sext i32 %a to i64
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%conv2 = sext i32 %b to i64
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%add = add nsw i64 %conv2, %conv
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%add.off = add i64 %add, 2147483648
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store i64 %add.off, i64* %P
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; CHECK-NOT: llvm.sadd.with.overflow
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%0 = icmp ugt i64 %add.off, 4294967295
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br i1 %0, label %if.then, label %if.end
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if.then:
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tail call void @throwAnExceptionOrWhatever() nounwind
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br label %if.end
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if.end:
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%conv9 = trunc i64 %add to i32
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; CHECK: ret i32
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ret i32 %conv9
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}
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; CHECK: test3
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; PR8816
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; This is illegal to transform because the high bits of the original add are
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; live out.
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define i64 @test3(i32 %a, i32 %b) nounwind ssp {
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entry:
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%conv = sext i32 %a to i64
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%conv2 = sext i32 %b to i64
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%add = add nsw i64 %conv2, %conv
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%add.off = add i64 %add, 2147483648
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; CHECK-NOT: llvm.sadd.with.overflow
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%0 = icmp ugt i64 %add.off, 4294967295
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br i1 %0, label %if.then, label %if.end
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if.then:
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tail call void @throwAnExceptionOrWhatever() nounwind
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br label %if.end
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if.end:
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ret i64 %add
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; CHECK: ret i64
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}
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; CHECK-LABEL: @test4(
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; Should be able to form an i8 sadd computed in an i32.
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define zeroext i8 @test4(i8 signext %a, i8 signext %b) nounwind ssp {
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entry:
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%conv = sext i8 %a to i32
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%conv2 = sext i8 %b to i32
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%add = add nsw i32 %conv2, %conv
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%add4 = add nsw i32 %add, 128
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%cmp = icmp ugt i32 %add4, 255
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br i1 %cmp, label %if.then, label %if.end
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; CHECK: llvm.sadd.with.overflow.i8
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if.then: ; preds = %entry
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tail call void @throwAnExceptionOrWhatever() nounwind
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unreachable
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if.end: ; preds = %entry
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%conv7 = trunc i32 %add to i8
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ret i8 %conv7
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; CHECK: ret i8
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}
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; CHECK-LABEL: @test8(
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; PR11438
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; This is @test1, but the operands are not sign-extended. Make sure
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; we don't transform this case.
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define i32 @test8(i64 %a, i64 %b) nounwind ssp {
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entry:
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; CHECK-NOT: llvm.sadd
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; CHECK: add i64 %a, %b
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; CHECK-NOT: llvm.sadd
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; CHECK: ret
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%add = add i64 %a, %b
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%add.off = add i64 %add, 2147483648
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%0 = icmp ugt i64 %add.off, 4294967295
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br i1 %0, label %if.then, label %if.end
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if.then:
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tail call void @throwAnExceptionOrWhatever() nounwind
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br label %if.end
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if.end:
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%conv9 = trunc i64 %add to i32
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ret i32 %conv9
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}
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