Nikolay Haustov acb1111440 [AMDGPU] Disassembler: Support for all VOP1 instructions.
Support all instructions with VOP1 encoding with 32 or 64-bit operands for VI subtarget:

VGPR_32 and VReg_64 operand register classes
VS_32 and VS_64 operand register classes with inline and literal constants
Tests for VOP1 instructions.

Patch by: skolton

Reviewers: arsenm, tstellarAMD

Review: http://reviews.llvm.org/D17194

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261878 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 16:09:14 +00:00
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