mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-24 20:29:53 +00:00
030db6490a
This is a sibling of: https://reviews.llvm.org/rL278859 https://reviews.llvm.org/rL278935 https://reviews.llvm.org/rL278945 https://reviews.llvm.org/rL279066 https://reviews.llvm.org/rL279077 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279101 91177308-0d34-0410-b5e6-96231b3b80d8
319 lines
7.7 KiB
LLVM
319 lines
7.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -instcombine -S < %s | FileCheck %s
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define i1 @test1(i32 %n, i32 %d) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 %d, %n
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 %n, %d
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%cmp1 = icmp eq i32 %div, 0
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ret i1 %cmp1
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}
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define <2 x i1> @test1vec(<2 x i32> %n, <2 x i32> %d) {
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; CHECK-LABEL: @test1vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i32> %d, %n
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> %n, %d
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%cmp1 = icmp eq <2 x i32> %div, zeroinitializer
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ret <2 x i1> %cmp1
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}
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define i1 @test2(i32 %d) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 %d, 64
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 64, %d
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%cmp1 = icmp eq i32 %div, 0
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ret i1 %cmp1
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}
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define <2 x i1> @test2vec(<2 x i32> %d) {
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; CHECK-LABEL: @test2vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i32> %d, <i32 64, i32 63>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 64, i32 63>, %d
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%cmp1 = icmp eq <2 x i32> %div, zeroinitializer
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ret <2 x i1> %cmp1
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}
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define i1 @test3(i32 %n, i32 %d) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ule i32 %d, %n
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 %n, %d
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%cmp1 = icmp ne i32 %div, 0
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ret i1 %cmp1
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}
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define <2 x i1> @test3vec(<2 x i32> %n, <2 x i32> %d) {
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; CHECK-LABEL: @test3vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ule <2 x i32> %d, %n
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> %n, %d
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%cmp1 = icmp ne <2 x i32> %div, zeroinitializer
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ret <2 x i1> %cmp1
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}
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define i1 @test4(i32 %d) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 %d, 65
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 64, %d
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%cmp1 = icmp ne i32 %div, 0
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ret i1 %cmp1
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}
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define <2 x i1> @test4vec(<2 x i32> %d) {
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; CHECK-LABEL: @test4vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> %d, <i32 65, i32 66>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 64, i32 65>, %d
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%cmp1 = icmp ne <2 x i32> %div, zeroinitializer
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ret <2 x i1> %cmp1
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}
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define i1 @test5(i32 %d) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret i1 true
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;
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%div = udiv i32 -1, %d
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%cmp1 = icmp ne i32 %div, 0
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ret i1 %cmp1
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}
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define <2 x i1> @test5vec(<2 x i32> %d) {
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; CHECK-LABEL: @test5vec(
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; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
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;
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%div = udiv <2 x i32> <i32 -1, i32 -1>, %d
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%cmp1 = icmp ne <2 x i32> %div, zeroinitializer
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ret <2 x i1> %cmp1
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}
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define i1 @test6(i32 %d) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 %d, 6
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 5, %d
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%cmp1 = icmp ugt i32 %div, 0
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ret i1 %cmp1
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}
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define <2 x i1> @test6vec(<2 x i32> %d) {
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; CHECK-LABEL: @test6vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> %d, <i32 6, i32 6>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 5, i32 5>, %d
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%cmp1 = icmp ugt <2 x i32> %div, zeroinitializer
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ret <2 x i1> %cmp1
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}
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; (icmp ugt (udiv C1, X), C1) -> false.
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define i1 @test7(i32 %d) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: ret i1 false
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;
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%div = udiv i32 8, %d
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%cmp1 = icmp ugt i32 %div, 8
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ret i1 %cmp1
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}
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define <2 x i1> @test7vec(<2 x i32> %d) {
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; CHECK-LABEL: @test7vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%div = udiv <2 x i32> <i32 8, i32 8>, %d
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%cmp1 = icmp ugt <2 x i32> %div, <i32 8, i32 8>
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ret <2 x i1> %cmp1
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}
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define i1 @test8(i32 %d) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 %d, 2
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ugt i32 %div, 3
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ret i1 %cmp1
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}
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define <2 x i1> @test8vec(<2 x i32> %d) {
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; CHECK-LABEL: @test8vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> %d, <i32 2, i32 2>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ugt <2 x i32> %div, <i32 3, i32 3>
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ret <2 x i1> %cmp1
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}
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define i1 @test9(i32 %d) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 %d, 2
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ugt i32 %div, 2
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ret i1 %cmp1
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}
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define <2 x i1> @test9vec(<2 x i32> %d) {
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; CHECK-LABEL: @test9vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> %d, <i32 2, i32 2>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ugt <2 x i32> %div, <i32 2, i32 2>
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ret <2 x i1> %cmp1
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}
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define i1 @test10(i32 %d) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 %d, 3
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ugt i32 %div, 1
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ret i1 %cmp1
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}
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define <2 x i1> @test10vec(<2 x i32> %d) {
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; CHECK-LABEL: @test10vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> %d, <i32 3, i32 3>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ugt <2 x i32> %div, <i32 1, i32 1>
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ret <2 x i1> %cmp1
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}
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define i1 @test11(i32 %d) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 %d, 4
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ult i32 %div, 1
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ret i1 %cmp1
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}
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define <2 x i1> @test11vec(<2 x i32> %d) {
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; CHECK-LABEL: @test11vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i32> %d, <i32 4, i32 4>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ult <2 x i32> %div, <i32 1, i32 1>
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ret <2 x i1> %cmp1
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}
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define i1 @test12(i32 %d) {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 %d, 2
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ult i32 %div, 2
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ret i1 %cmp1
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}
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define <2 x i1> @test12vec(<2 x i32> %d) {
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; CHECK-LABEL: @test12vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i32> %d, <i32 2, i32 2>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ult <2 x i32> %div, <i32 2, i32 2>
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ret <2 x i1> %cmp1
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}
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define i1 @test13(i32 %d) {
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 %d, 1
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ult i32 %div, 3
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ret i1 %cmp1
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}
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define <2 x i1> @test13vec(<2 x i32> %d) {
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; CHECK-LABEL: @test13vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i32> %d, <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ult <2 x i32> %div, <i32 3, i32 3>
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ret <2 x i1> %cmp1
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}
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define i1 @test14(i32 %d) {
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 %d, 1
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; CHECK-NEXT: ret i1 [[CMP1]]
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ult i32 %div, 4
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ret i1 %cmp1
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}
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define <2 x i1> @test14vec(<2 x i32> %d) {
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; CHECK-LABEL: @test14vec(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i32> %d, <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i1> [[CMP1]]
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ult <2 x i32> %div, <i32 4, i32 4>
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ret <2 x i1> %cmp1
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}
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; icmp ugt X, UINT_MAX -> false.
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define i1 @test15(i32 %d) {
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: ret i1 false
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ugt i32 %div, -1
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ret i1 %cmp1
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}
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define <2 x i1> @test15vec(<2 x i32> %d) {
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; CHECK-LABEL: @test15vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ugt <2 x i32> %div, <i32 -1, i32 -1>
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ret <2 x i1> %cmp1
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}
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; icmp ult X, UINT_MAX -> true.
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define i1 @test16(i32 %d) {
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: ret i1 true
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;
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%div = udiv i32 4, %d
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%cmp1 = icmp ult i32 %div, -1
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ret i1 %cmp1
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}
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define <2 x i1> @test16vec(<2 x i32> %d) {
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; CHECK-LABEL: @test16vec(
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; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
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;
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%div = udiv <2 x i32> <i32 4, i32 4>, %d
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%cmp1 = icmp ult <2 x i32> %div, <i32 -1, i32 -1>
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ret <2 x i1> %cmp1
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}
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