Craig Topper 1db7e25e94 [InstCombine] Remove unreachable code for turning an And where all demanded bits on both sides are known to be zero into a constant 0. ... We already handled a superset check that included the known ones too and folded to a constant that may include ones. But it can also handle the case of no ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300093 91177308-0d34-0410-b5e6-96231b3b80d8		2017-04-12 19:08:03 +00:00
..
Analysis	[LoopVectorizer, TTI] New method supportsEfficientVectorElementLoadStore()	2017-04-12 12:41:37 +00:00
AsmParser	[IR] Add AttributeSet to hide AttributeSetNode* again, NFC	2017-04-12 00:38:00 +00:00
Bitcode	[IR] Redesign the case iterator in SwitchInst to actually be an iterator	2017-04-12 07:27:28 +00:00
CodeGen	[SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.	2017-04-12 18:39:27 +00:00
DebugInfo	[DWARF] Fix compiler warnings in DWARFContext.cpp, NFCi	2017-04-12 11:33:26 +00:00
Demangle
ExecutionEngine	[IR] Redesign the case iterator in SwitchInst to actually be an iterator	2017-04-12 07:27:28 +00:00
Fuzzer	[libFuzzer] fix type in signal name.	2017-04-11 18:20:05 +00:00
IR	[IR] Redesign the case iterator in SwitchInst to actually be an iterator	2017-04-12 07:27:28 +00:00
IRReader
LibDriver
LineEditor
Linker
LTO	LTO: call getRealLinkageName on IRNames before feeding to getGUID	2017-03-31 21:56:30 +00:00
MC	MC: Remove unused virtual function MCObjectWriter::isWeak. NFC.	2017-04-08 23:35:49 +00:00
Object	Remove unused functions. Remove static qualifier from functions in header files. NFC.	2017-04-11 14:55:32 +00:00
ObjectYAML	Add virtual destructor to WasmYAML::Section or avoid memory leak	2017-03-31 22:14:14 +00:00
Option
Passes	MemorySSA: Move to Analysis, from Transforms/Utils. It's used as	2017-04-11 20:06:36 +00:00
ProfileData	[PGO] Memory intrinsic calls optimization based on profiled size	2017-04-04 16:42:20 +00:00
Support	Fix detection of backtrace() availability on FreeBSD	2017-04-12 13:51:00 +00:00
TableGen
Target	[AMDGPU][MC] Added support for several VI-specific opcodes (s_wakeup, etc)	2017-04-12 17:10:07 +00:00
Transforms	[InstCombine] Remove unreachable code for turning an And where all demanded bits on both sides are known to be zero into a constant 0.	2017-04-12 19:08:03 +00:00
XRay	[XRay] - Fix spelling error to test commit access.	2017-04-06 03:32:01 +00:00
CMakeLists.txt
LLVMBuild.txt