Simon Dardis 1ece62aab5 [mips][mt][6/7] Add support for mftr, mttr instructions.
Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307836 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-12 19:47:45 +00:00
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2017-07-07 02:59:13 +00:00
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2016-01-26 21:29:08 +00:00
2017-07-01 03:24:06 +00:00
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Low Level Virtual Machine (LLVM)
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