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f88a2853c8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
1.6 KiB
C++
52 lines
1.6 KiB
C++
//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
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//
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// This file defines the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#include "X86TargetMachine.h"
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#include "llvm/Target/TargetMachineImpls.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/PassManager.h"
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#include "X86.h"
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#include <iostream>
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// allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
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// that implements the X86 backend.
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//
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TargetMachine *allocateX86TargetMachine() { return new X86TargetMachine(); }
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/// X86TargetMachine ctor - Create an ILP32 architecture model
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///
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X86TargetMachine::X86TargetMachine() : TargetMachine("X86", 1, 4, 4, 4) {
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}
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/// addPassesToJITCompile - Add passes to the specified pass manager to
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/// implement a fast dynamic compiler for this target. Return true if this is
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/// not supported for this target.
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///
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bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) {
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PM.add(createSimpleX86InstructionSelector(*this));
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// TODO: optional optimizations go here
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// Print the instruction selected machine code...
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PM.add(createMachineFunctionPrinterPass());
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// Perform register allocation to convert to a concrete x86 representation
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PM.add(createSimpleX86RegisterAllocator(*this));
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// Print the instruction selected machine code...
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// PM.add(createMachineFunctionPrinterPass());
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// Print the register-allocated code
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PM.add(createX86CodePrinterPass(*this, std::cerr));
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//PM.add(createEmitX86CodeToMemory(*this));
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return false; // success!
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}
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