llvm/lib/CodeGen/SelectionDAG
Cong Hou e4f9f1583a Detecte vector reduction operations just before instruction selection.
(This is the second attemp to commit this patch, after fixing pr26652 & pr26653).

This patch detects vector reductions before instruction selection. Vector
reductions are vectorized reduction operations, and for such operations we have
freedom to reorganize the elements of the result as long as the reduction of them
stay unchanged. This will enable some reduction pattern recognition during
instruction combine such as SAD/dot-product on X86. A flag is added to
SDNodeFlags to mark those vector reduction nodes to be checked during instruction
combine.

To detect those vector reductions, we search def-use chains starting from the
given instruction, and check if all uses fall into two categories:

1. Reduction with another vector.
2. Reduction on all elements.

in which 2 is detected by recognizing the pattern that the loop vectorizer
generates to reduce all elements in the vector outside of the loop, which
includes several ShuffleVector and one ExtractElement instructions.


Differential revision: http://reviews.llvm.org/D15250




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261804 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-24 23:40:36 +00:00
..
CMakeLists.txt Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/ 2016-01-27 16:32:26 +00:00
DAGCombiner.cpp [DAGCombiner] Use getBitcast helper when possible. NFCI. 2016-02-20 15:05:29 +00:00
FastISel.cpp [NFC] Replace several manual GEP loops with gep_type_iterator. 2016-01-20 00:26:52 +00:00
FunctionLoweringInfo.cpp Undo spurious change made in r256965 2016-01-07 04:31:35 +00:00
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp LegalizeDAG: Fix ExpandFCOPYSIGN assuming the same type on both inputs 2016-02-19 04:44:19 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp [X86] Don't transform X << 1 to X + X during type legalization 2016-01-28 18:20:05 +00:00
LegalizeTypes.cpp
LegalizeTypes.h
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp [CodeGen] Document and use getConstant's splat-building feature. NFC. 2016-02-15 18:07:29 +00:00
LegalizeVectorTypes.cpp
LLVMBuild.txt
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp rangify; NFCI 2016-02-03 22:44:14 +00:00
ScheduleDAGSDNodes.cpp Avoid overly large SmallPtrSet/SmallSet 2016-01-30 01:24:31 +00:00
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SelectionDAG.cpp SelectionDAG: Use correct addrspace when lowering memcpy 2016-02-22 22:01:42 +00:00
SelectionDAGBuilder.cpp Detecte vector reduction operations just before instruction selection. 2016-02-24 23:40:36 +00:00
SelectionDAGBuilder.h SelectionDAG: Lower some range metadata to AssertZext 2016-02-08 16:28:19 +00:00
SelectionDAGDumper.cpp Avoid overly large SmallPtrSet/SmallSet 2016-01-30 01:24:31 +00:00
SelectionDAGISel.cpp Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes. 2016-02-02 18:20:45 +00:00
SelectionDAGPrinter.cpp
SelectionDAGTargetInfo.cpp Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/ 2016-01-27 16:32:26 +00:00
StatepointLowering.cpp [StatepointLowering] Minor non-semantic cleanups 2016-02-19 19:37:07 +00:00
StatepointLowering.h [StatepointLowering] Change AllocatedStackSlots to use SmallBitVector 2016-02-19 17:15:26 +00:00
TargetLowering.cpp Remove uses of builtin comma operator. 2016-02-18 22:09:30 +00:00