llvm/test/CodeGen/NVPTX
Justin Holewinski 21fdcb0271 [NVPTX] Add NVVMReflect pass to allow compile-time selection of
specific code paths.

This allows us to write code like:

  if (__nvvm_reflect("FOO"))
    // Do something
  else
    // Do something else

and compile into a library, then give "FOO" a value at kernel
compile-time so the check becomes a no-op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178416 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-30 14:29:25 +00:00
..
annotations.ll
arithmetic-fp-sm10.ll
arithmetic-fp-sm20.ll
arithmetic-int.ll
calling-conv.ll
compare-int.ll
convert-fp.ll
convert-int-sm10.ll
convert-int-sm20.ll
fma-disable.ll
fma.ll
global-ordering.ll [NVPTX] Order global variables in def-use order before emiting them in the final assembly 2012-11-16 21:03:51 +00:00
intrin-nocapture.ll [NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture is not valid in this case, and was causing incorrect optimizations. 2013-02-11 18:56:35 +00:00
intrinsic-old.ll
intrinsics.ll
ld-addrspace.ll
ld-generic.ll
lit.local.cfg
nvvm-reflect.ll [NVPTX] Add NVVMReflect pass to allow compile-time selection of 2013-03-30 14:29:25 +00:00
param-align.ll
pr13291-i1-store.ll [NVPTX] Implement custom lowering of loads/stores for i1 2012-11-14 19:19:16 +00:00
ptx-version-30.ll
ptx-version-31.ll
sched1.ll Propagate DAG node ordering during type legalization and instruction selection 2013-03-20 00:10:32 +00:00
sched2.ll Propagate DAG node ordering during type legalization and instruction selection 2013-03-20 00:10:32 +00:00
simple-call.ll
sm-version-10.ll
sm-version-11.ll
sm-version-12.ll
sm-version-13.ll
sm-version-20.ll
sm-version-21.ll
sm-version-30.ll
sm-version-35.ll
st-addrspace.ll
st-generic.ll
tuple-literal.ll [NVPTX] Fix crash with unnamed struct arguments 2012-12-05 20:50:28 +00:00
vector-args.ll [NVPTX] Fix handling of vector arguments 2013-03-24 21:17:47 +00:00
vector-compare.ll Allow targets to prefer TypeSplitVector over TypePromoteInteger when computing the legalization method for vectors 2012-11-29 14:26:24 +00:00
vector-loads.ll Propagate DAG node ordering during type legalization and instruction selection 2013-03-20 00:10:32 +00:00
vector-select.ll Teach the legalizer how to handle operands for VSELECT nodes 2012-11-29 14:26:28 +00:00