Zhan Jun Liau 23b8e3e7cc [SystemZ] Support Compare and Traps ... Support and generate Compare and Traps like CRT, CIT, etc. Support Trap as legal DAG opcodes and generate "j .+2" for them by default. Add support for Conditional Traps and use the If Converter to convert them into the corresponding compare and trap opcodes. Differential Revision: http://reviews.llvm.org/D21155 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272419 91177308-0d34-0410-b5e6-96231b3b80d8		2016-06-10 19:58:10 +00:00
..
AArch64	Reapply "[MBP] Reduce code size by running tail merging in MBP.""	2016-06-09 15:24:29 +00:00
AMDGPU	AMDGPU/SI: Don't use fixup_si_rodata for scratch rsrc relocations	2016-06-10 19:26:38 +00:00
ARM	Reapply "[MBP] Reduce code size by running tail merging in MBP.""	2016-06-09 15:24:29 +00:00
BPF	[BPF] Remove exit-on-error from tests (PR27768, PR27769)	2016-05-30 08:28:34 +00:00
Generic	Move CodeGen test from Generic to X86 specific directory	2016-06-10 19:14:01 +00:00
Hexagon	[Hexagon] Enable the post-RA scheduler	2016-05-26 19:44:28 +00:00
Inputs
Lanai	[lanai] Change reloc to use PIC_ by default and cleanup.	2016-05-20 21:41:53 +00:00
Mips	[mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*, SELNEZ.* and CMP.condn.fmt instructions	2016-06-09 11:15:53 +00:00
MIR	[llc] Add support for several run-pass options.	2016-06-10 00:52:10 +00:00
MSP430
NVPTX	[NVPTX] Add intrinsics for shfl instructions.	2016-06-09 20:04:08 +00:00
PowerPC	Add aliases for mfvrsave/mtvrsave.	2016-06-09 23:27:48 +00:00
SPARC	[Sparc] Allow passing of empty structs.	2016-06-01 08:48:56 +00:00
SystemZ	[SystemZ] Support Compare and Traps	2016-06-10 19:58:10 +00:00
Thumb	[Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated	2016-06-09 07:39:08 +00:00
Thumb2
WebAssembly	[WebAssembly] Emit type signatures for declared functions	2016-06-03 18:34:36 +00:00
WinEH
X86	Move CodeGen test from Generic to X86 specific directory	2016-06-10 19:14:01 +00:00
XCore