llvm/lib/CodeGen/LiveStackAnalysis.cpp
Benjamin Kramer 991de14dd6 Introduce SpecificBumpPtrAllocator, a wrapper for BumpPtrAllocator which allows
only a single type of object to be allocated. Use it to make VNInfo destruction
typesafe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30 20:16:45 +00:00

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2.0 KiB
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//===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements the live stack slot analysis pass. It is analogous to
// live interval analysis except it's analyzing liveness of stack slots rather
// than registers.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "livestacks"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/Statistic.h"
#include <limits>
using namespace llvm;
char LiveStacks::ID = 0;
static RegisterPass<LiveStacks> X("livestacks", "Live Stack Slot Analysis");
void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addPreserved<SlotIndexes>();
AU.addRequiredTransitive<SlotIndexes>();
MachineFunctionPass::getAnalysisUsage(AU);
}
void LiveStacks::releaseMemory() {
// Release VNInfo memroy regions after all VNInfo objects are dtor'd.
VNInfoAllocator.DestroyAll();
S2IMap.clear();
S2RCMap.clear();
}
bool LiveStacks::runOnMachineFunction(MachineFunction &) {
// FIXME: No analysis is being done right now. We are relying on the
// register allocators to provide the information.
return false;
}
/// print - Implement the dump method.
void LiveStacks::print(raw_ostream &OS, const Module*) const {
OS << "********** INTERVALS **********\n";
for (const_iterator I = begin(), E = end(); I != E; ++I) {
I->second.print(OS);
int Slot = I->first;
const TargetRegisterClass *RC = getIntervalRegClass(Slot);
if (RC)
OS << " [" << RC->getName() << "]\n";
else
OS << " [Unknown]\n";
}
}