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ea7a0c0467
This makes it possible to distinguish between mesa shaders and other kernels even in the presence of compute shaders. Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Differential Revision: http://reviews.llvm.org/D18559 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265589 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
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@lds = external addrspace(3) global [64 x float]
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; CHECK-LABEL: {{^}}main:
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; CHECK-NOT: v_readlane_b32 m0
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define amdgpu_ps void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg) {
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main_body:
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%4 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
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%cmp = fcmp ueq float 0.0, %4
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br i1 %cmp, label %if, label %else
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if:
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%lds_ptr = getelementptr [64 x float], [64 x float] addrspace(3)* @lds, i32 0, i32 0
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%lds_data = load float, float addrspace(3)* %lds_ptr
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br label %endif
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else:
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%interp = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
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br label %endif
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endif:
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%export = phi float [%lds_data, %if], [%interp, %else]
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%5 = call i32 @llvm.SI.packf16(float %export, float %export)
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%6 = bitcast i32 %5 to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %6, float %6, float %6, float %6)
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ret void
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}
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declare float @llvm.SI.fs.constant(i32, i32, i32) readnone
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declare i32 @llvm.SI.packf16(float, float) readnone
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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