llvm/test/Transforms/LoopStrengthReduce
Chuang-Yu Cheng afa4f41e9c Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge
Presently, CodeGenPrepare deletes all nearly empty (only phi and branch)
basic blocks. This pass can delete loop preheaders which frequently creates
critical edges. A preheader can be a convenient place to spill registers to
the stack. If the entrance to a loop body is a critical edge, then spills
may occur in the loop body rather than immediately before it. This patch
protects loop preheaders from deletion in CodeGenPrepare even if they are
nearly empty.

Since the patch alters the CFG, it affects a large number of test cases.
In most cases, the changes are merely cosmetic (basic blocks have different
names or instruction orders change slightly). I am somewhat concerned about
the test/CodeGen/Mips/brdelayslot.ll test case. If the loop preheader is not
deleted, then the MIPS backend does not take advantage of a branch delay
slot. Consequently, I would like some close review by a MIPS expert.

The patch also partially subsumes D16893 from George Burgess IV. George
correctly notes that CodeGenPrepare does not actually preserve the dominator
tree. I think the dominator tree was usually not valid when CodeGenPrepare
ran, but I am using LoopInfo to mark preheaders, so the dominator tree is
now always valid before CodeGenPrepare.

Author: Tom Jablin (tjablin)
Reviewers: hfinkel george.burgess.iv vkalintiris dsanders kbarton cycheng

http://reviews.llvm.org/D16984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265397 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-05 14:06:20 +00:00
..
AArch64 Revert "[LSR] Create fewer redundant instructions." 2016-03-16 19:21:47 +00:00
AMDGPU LoopStrengthReduce: Try to pass address space to isLegalAddressingMode 2015-08-15 00:53:06 +00:00
ARM [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions 2015-09-30 10:56:37 +00:00
NVPTX [NVPTX] truncating 64-bit to 32-bit is free 2015-08-20 20:59:02 +00:00
X86 Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge 2016-04-05 14:06:20 +00:00
2005-08-15-AddRecIV.ll
2005-08-17-OutOfLoopVariant.ll
2005-09-12-UsesOutOutsideOfLoop.ll
2007-04-23-UseIterator.ll
2008-08-13-CmpStride.ll
2008-09-09-Overflow.ll
2009-01-13-nonconstant-stride-outside-loop.ll
2009-04-28-no-reduce-mul.ll
2011-07-19-CritEdgeBreakCrash.ll
2011-10-03-CritEdgeMerge.ll
2011-10-06-ReusePhi.ll
2011-10-13-SCEVChain.ll
2011-10-14-IntPtr.ll
2011-12-19-PostincQuadratic.ll
2012-01-02-nopreheader.ll
2012-01-16-nopreheader.ll
2012-03-15-nopreheader.ll
2012-03-26-constexpr.ll
2012-07-13-ExpandUDiv.ll
2012-07-18-LimitReassociate.ll
2013-01-05-IndBr.ll
2013-01-14-ReuseCast.ll
addrec-gep-address-space.ll
addrec-gep.ll
address-space-loop.ll
count-to-zero.ll
dead-phi.ll
different-type-ivs.ll
dominate-assert.ll
dont_insert_redundant_ops.ll
dont_reduce_bytes.ll
dont_reverse.ll
dont-hoist-simple-loop-constants.ll
ephemeral.ll [LSR] don't attempt to promote ephemeral values to indvars 2015-07-13 03:28:53 +00:00
exit_compare_live_range.ll
funclet.ll [LoopStrengthReduce] Don't rewrite PHIs with incoming values from CatchSwitches 2016-02-03 21:30:34 +00:00
hoist-parent-preheader.ll
invariant_value_first_arg.ll
invariant_value_first.ll
ivchain.ll
lsr-expand-quadratic.ll
negative-scale.ll
nested-reduce.ll
nonlinear-postinc.ll
ops_after_indvar.ll
phi_node_update_multiple_preds.ll
post-inc-icmpzero.ll [SCEV] Try to reuse existing value during SCEV expansion 2016-02-04 01:27:38 +00:00
pr2537.ll
pr2570.ll
pr3086.ll
pr3399.ll
pr3571.ll
pr12018.ll DI: Require subprogram definitions to be distinct 2015-08-28 20:26:49 +00:00
pr12048.ll
pr12691.ll
pr18165.ll
pr25541.ll [IR] Reformulate LLVM's EH funclet IR 2015-12-12 05:38:55 +00:00
pr27056.ll [LoopStrengthReduce] Don't hoist into a catchswitch 2016-03-24 21:40:22 +00:00
preserve-gep-loop-variant.ll
quadradic-exit-value.ll [SCEV] Mark AddExprs as nsw or nuw if legal 2015-10-22 19:57:19 +00:00
related_indvars.ll
remove_indvar.ll
scaling_factor_cost_crash.ll
sext-ind-var.ll [SCEV] Apply NSW and NUW flags via poison value analysis for sub, mul and shl 2015-08-14 22:45:26 +00:00
share_code_in_preheader.ll
share_ivs.ll
shl.ll
uglygep-address-space.ll
uglygep.ll
use_postinc_value_outside_loop.ll
var_stride_used_by_compare.ll
variable_stride.ll