llvm/test/Transforms/InstCombine/demand_shrink_nsw.ll
Matthias Braun af2e236c11 InstCombineSimplifyDemanded: Remove nsw/nuw flags when optimizing demanded bits
When optimizing demanded bits of the operands of an Add we have to
remove the nsw/nuw flags as we have no guarantee anymore that we don't
wrap.  This is legal here because the top bit is not demanded.  In fact
this operaion was already performed but missed in the case of an Add
with a constant on the right side.  To fix this this patch refactors the
code to unify the code paths in SimplifyDemandedUseBits() handling of
Add/Sub:

- The transformation of Add->Or is removed from the simplify demand
  code because the equivalent transformation exists in
  InstCombiner::visitAdd()
- KnownOnes/KnownZero are not adjusted for Add x, C anymore as
  computeKnownBits() already performs these computations.
- The simplification of the operands is unified. In this new version
  constant on the right side of a Sub are shrunk now as I could not find
  a reason why not to do so.
- The special case for clearing nsw/nuw in ShrinkDemandedConstant() is
  not necessary anymore as the caller does that already.

Differential Revision: http://reviews.llvm.org/D9415

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236269 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-30 22:05:30 +00:00

27 lines
850 B
LLVM

; RUN: opt -instcombine -o - -S %s | FileCheck %s
; The constant at %v35 should be shrunk, but this must lead to the nsw flag of
; %v43 getting removed so that %v44 is not illegally optimized away.
; CHECK-LABEL: @foo
; CHECK: %v35 = add nuw i32 %v34, 1362915575
; ...
; CHECK: add nuw i32 %v42, 1533579450
; CHECK-NEXT: %v44 = or i32 %v43, -2147483648
; CHECK-NEXT: %v45 = xor i32 %v44, 749011377
; CHECK-NEXT: ret i32 %v45
define i32 @foo(i32 %arg) {
%v33 = and i32 %arg, 223
%v34 = xor i32 %v33, 29
%v35 = add nuw i32 %v34, 3510399223
%v37 = or i32 %v34, 1874836915
%v38 = and i32 %v34, 221
%v39 = xor i32 %v38, 1874836915
%v40 = xor i32 %v37, %v39
%v41 = shl nsw nuw i32 %v40, 1
%v42 = sub i32 %v35, %v41
%v43 = add nsw i32 %v42, 1533579450
%v44 = or i32 %v43, -2147483648
%v45 = xor i32 %v44, 749011377
ret i32 %v45
}