llvm/lib/CodeGen
Chris Lattner 26d2990e03 Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to
apply to rems as well as divs.  This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).

It compiles CodeGen/X86/rem.ll into:

_test1:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        imull %ecx
        addl %esi, %edx
        movl %edx, %eax
        shrl $31, %eax
        sarl $7, %edx
        addl %eax, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret
_test2:
        movl 4(%esp), %eax
        movl %eax, %ecx
        sarl $31, %ecx
        shrl $24, %ecx
        addl %eax, %ecx
        andl $4294967040, %ecx
        subl %ecx, %eax
        ret
_test3:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        mull %ecx
        shrl $7, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret

instead of div/idiv instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 20:58:32 +00:00
..
SelectionDAG Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to 2006-10-12 20:58:32 +00:00
AsmPrinter.cpp Jimptables working again on alpha. 2006-10-11 04:29:42 +00:00
BranchFolding.cpp
DwarfWriter.cpp More long term solution 2006-10-04 10:40:15 +00:00
ELFWriter.cpp
IntrinsicLowering.cpp
LiveInterval.cpp When joining two intervals where the RHS is really simple, use a light-weight 2006-09-02 05:26:59 +00:00
LiveIntervalAnalysis.cpp Keep track of the start of MBB's in a separate map from instructions. This 2006-09-15 03:57:23 +00:00
LiveVariables.cpp Fix for PR929. The PHI nodes were being gone through for each instruction 2006-10-03 07:20:20 +00:00
LLVMTargetMachine.cpp add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 2006-09-04 06:21:35 +00:00
MachineBasicBlock.cpp print labels even if a MBB doesn't have a corresponding LLVM BB, just don't 2006-10-06 21:28:17 +00:00
MachineDebugInfo.cpp Adding C++ member support. 2006-08-21 21:20:18 +00:00
MachineFunction.cpp Bugfixes 2006-10-03 20:19:23 +00:00
MachineInstr.cpp Only call isUse/isDef on register operands 2006-09-05 20:19:27 +00:00
MachinePassRegistry.cpp Final polish on machine pass registries. 2006-08-02 12:30:23 +00:00
MachOWriter.cpp Behold, more work on relocations. Things are looking pretty good now. 2006-09-10 23:03:44 +00:00
Makefile Fix linking on Alpha 2006-07-20 17:27:58 +00:00
Passes.cpp Work around a bug in gcc 3.3.5, reported by a user 2006-08-03 00:16:56 +00:00
PHIElimination.cpp "Once more into the breach, dear friends, once more, or fill the wall up 2006-09-28 07:10:24 +00:00
PhysRegTracker.h
PrologEpilogInserter.cpp TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller. 2006-09-28 18:52:32 +00:00
RegAllocLinearScan.cpp s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 2006-08-27 12:54:02 +00:00
RegAllocLocal.cpp Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not 2006-09-19 18:02:01 +00:00
RegAllocSimple.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp eliminate RegisterOpt. It does the same thing as RegisterPass. 2006-08-27 22:42:52 +00:00
VirtRegMap.cpp restore my previous patch, now that the X86 backend bug has been fixed: 2006-10-12 17:45:38 +00:00
VirtRegMap.h Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00