Nirav Dave 27b2476a1f [MC][X86] Fix Intel Operand assembly parsing for .set ids ... Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276895 91177308-0d34-0410-b5e6-96231b3b80d8		2016-07-27 17:39:41 +00:00
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AArch64	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
AMDGPU	AMDGPU/SI: Add support for R_AMDGPU_ABS32	2016-07-21 15:29:19 +00:00
ARM	[ARM] Check that the thumb COFF segment flag gets set on thumb windows	2016-07-27 14:37:18 +00:00
AsmParser	[MC] Add command-line option to choose the max nest level in asm macros.	2016-07-27 05:51:56 +00:00
COFF	[codeview] Shrink inlined call site line info tables	2016-07-14 23:47:15 +00:00
Disassembler	[mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText.	2016-07-27 13:49:44 +00:00
ELF	Add initial support for R_386_GOT32X.	2016-07-06 21:19:11 +00:00
Hexagon	Remove redundant -mattr options from llvm-objdump commands.	2016-06-16 15:47:19 +00:00
Lanai	[lanai] Add more tests for assembly of conditional ALU ops	2016-07-11 17:58:16 +00:00
MachO	CodeGen: Use PLT relocations for relative references to unnamed_addr functions.	2016-04-22 20:40:10 +00:00
Markup
Mips	[mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText.	2016-07-27 13:49:44 +00:00
PowerPC	Add aliases for mfvrsave/mtvrsave.	2016-06-09 23:27:48 +00:00
Sparc	Don't pass a Reloc::Model to MC.	2016-05-18 11:58:50 +00:00
SystemZ	[SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunities	2016-07-11 18:45:03 +00:00
X86	[MC][X86] Fix Intel Operand assembly parsing for .set ids	2016-07-27 17:39:41 +00:00