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49b5e6b8a4
Add the necessary definitions for RISC-V ELF files, including relocs. Also make necessary trivial change to ELFYaml, llvm-objdump, and llvm-readobj in order to work with RISC-V ELFs. Differential Revision: https://reviews.llvm.org/D23557 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285708 91177308-0d34-0410-b5e6-96231b3b80d8
145 lines
2.9 KiB
C++
145 lines
2.9 KiB
C++
//===- ELF.cpp - ELF object file implementation -----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Object/ELF.h"
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namespace llvm {
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namespace object {
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#define ELF_RELOC(name, value) \
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case ELF::name: \
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return #name; \
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StringRef getELFRelocationTypeName(uint32_t Machine, uint32_t Type) {
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switch (Machine) {
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case ELF::EM_X86_64:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/x86_64.def"
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default:
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break;
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}
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break;
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case ELF::EM_386:
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case ELF::EM_IAMCU:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/i386.def"
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default:
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break;
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}
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break;
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case ELF::EM_MIPS:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/Mips.def"
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default:
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break;
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}
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break;
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case ELF::EM_AARCH64:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/AArch64.def"
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default:
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break;
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}
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break;
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case ELF::EM_ARM:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/ARM.def"
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default:
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break;
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}
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break;
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case ELF::EM_AVR:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/AVR.def"
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default:
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break;
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}
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break;
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case ELF::EM_HEXAGON:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/Hexagon.def"
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default:
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break;
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}
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break;
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case ELF::EM_LANAI:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/Lanai.def"
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default:
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break;
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}
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break;
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case ELF::EM_PPC:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/PowerPC.def"
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default:
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break;
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}
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break;
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case ELF::EM_PPC64:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/PowerPC64.def"
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default:
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break;
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}
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break;
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case ELF::EM_RISCV:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/RISCV.def"
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default:
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break;
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}
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break;
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case ELF::EM_S390:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/SystemZ.def"
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default:
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break;
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}
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break;
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case ELF::EM_SPARC:
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case ELF::EM_SPARC32PLUS:
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case ELF::EM_SPARCV9:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/Sparc.def"
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default:
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break;
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}
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break;
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case ELF::EM_WEBASSEMBLY:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/WebAssembly.def"
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default:
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break;
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}
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break;
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case ELF::EM_AMDGPU:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/AMDGPU.def"
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default:
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break;
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}
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case ELF::EM_BPF:
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switch (Type) {
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#include "llvm/Support/ELFRelocs/BPF.def"
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default:
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break;
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}
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break;
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default:
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break;
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}
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return "Unknown";
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}
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#undef ELF_RELOC
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} // end namespace object
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} // end namespace llvm
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