Jakob Stoklund Olesen 845d2c0c77 Add TRI::getSubClassWithSubReg(RC, Idx) function. ...

This function is used to constrain a register class to a sub-class that
supports the given sub-register index.

For example, getSubClassWithSubReg(GR32, sub_8bit) -> GR32_ABCD.

The function will be used to compute register classes when emitting
INSERT_SUBREG and EXTRACT_SUBREG nodes and for register class inflation
of sub-register operations.

The version provided by TableGen is usually adequate, but targets can
override.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141142 91177308-0d34-0410-b5e6-96231b3b80d8

2011-10-05 00:35:49 +00:00

..

llvm

Add TRI::getSubClassWithSubReg(RC, Idx) function.

2011-10-05 00:35:49 +00:00

llvm-c

Adding back support for printing operands symbolically to ARM's new disassembler

2011-10-04 22:44:48 +00:00