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https://github.com/RPCSX/llvm.git
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0f1b95f818
If we know we have stack objects, we reserve the registers that the private buffer resource and wave offset are passed and use them directly. If not, reserve the last 5 SGPRs just in case we need to spill. After register allocation, try to pick the next available registers instead of the last SGPRs, and then insert copies from the inputs to the reserved registers in the progloue. This also only selectively enables all of the input registers which are really required instead of always enabling them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254331 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
1.7 KiB
LLVM
50 lines
1.7 KiB
LLVM
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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@local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
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; Check that the LDS size emitted correctly
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; EG: .long 166120
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; EG-NEXT: .long 128
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; SI: .long 47180
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; SI-NEXT: .long 65668
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; CI: .long 47180
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; CI-NEXT: .long 32900
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; FUNC-LABEL: {{^}}local_memory:
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; EG: LDS_WRITE
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; SI-NOT: s_wqm_b64
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; SI: ds_write_b32
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; GROUP_BARRIER must be the last instruction in a clause
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; EG: GROUP_BARRIER
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; EG-NEXT: ALU clause
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; SI: s_barrier
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; EG: LDS_READ_RET
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; SI: ds_read_b32 {{v[0-9]+}},
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define void @local_memory(i32 addrspace(1)* %out) {
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entry:
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%y.i = call i32 @llvm.r600.read.tidig.x() #0
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%arrayidx = getelementptr inbounds [128 x i32], [128 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %y.i
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store i32 %y.i, i32 addrspace(3)* %arrayidx, align 4
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%add = add nsw i32 %y.i, 1
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%cmp = icmp eq i32 %add, 16
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%.add = select i1 %cmp, i32 0, i32 %add
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call void @llvm.AMDGPU.barrier.local()
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%arrayidx1 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %.add
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%0 = load i32, i32 addrspace(3)* %arrayidx1, align 4
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%arrayidx2 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %y.i
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store i32 %0, i32 addrspace(1)* %arrayidx2, align 4
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ret void
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}
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declare i32 @llvm.r600.read.tidig.x() #0
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declare void @llvm.AMDGPU.barrier.local()
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attributes #0 = { readnone }
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