Nirav Dave cf83621dcd [X86] Improve code size on X86 segment moves ...

Moves of a value to a segment register from a 16-bit register is
equivalent to one from it's corresponding 32-bit register. Match gas's
behavior and rewrite instructions to the shorter of equivalent forms.

Reviewers: rnk, ab

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23166

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278031 91177308-0d34-0410-b5e6-96231b3b80d8

2016-08-08 18:01:04 +00:00

..

AArch64

AArch64: TableGenerate system instruction operands.

2016-07-05 21:23:04 +00:00

AMDGPU

[AMDGPU] refactor DS instruction definitions. NFC.

2016-08-01 14:21:30 +00:00

ARM

Fix handling of end-of-line preprocessor comments Attempt 2

2016-08-02 19:17:54 +00:00

AsmParser

Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"

2016-08-01 23:00:01 +00:00

COFF

[codeview] Shrink inlined call site line info tables

2016-07-14 23:47:15 +00:00

Disassembler

[SystemZ] Add missing classes and instructions

2016-08-05 15:14:34 +00:00

ELF

Add initial support for R_386_GOT32X.

2016-07-06 21:19:11 +00:00

Hexagon

Remove redundant -mattr options from llvm-objdump commands.

2016-06-16 15:47:19 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

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Markup

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Mips

Re-commit r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary operators (%hi/%lo/%gp_rel/etc.).

2016-08-08 11:50:25 +00:00

PowerPC

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Sparc

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SystemZ

[SystemZ] Add support for the .insn directive

2016-08-08 15:13:08 +00:00

X86

[X86] Improve code size on X86 segment moves

2016-08-08 18:01:04 +00:00