Sanjay Patel 2b918388ab Lower FNEG ( FABS (x) ) -> FNABS (x) [X86 codegen] PR20578 ... Negative FABS of either a scalar or vector should be handled the same way on x86 with SSE/AVX: a single OR instruction of the FP operand with a constant to light up the sign bit(s). http://llvm.org/bugs/show_bug.cgi?id=20578 Differential Revision: http://reviews.llvm.org/D5201 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218822 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-01 21:20:06 +00:00
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Analysis	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
Assembler	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
Bindings
Bitcode
BugPoint
CodeGen	Lower FNEG ( FABS (x) ) -> FNABS (x) [X86 codegen] PR20578	2014-10-01 21:20:06 +00:00
DebugInfo	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
Integer
JitListener	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
Linker	Move the complex address expression out of DIVariable and into an extra	2014-10-01 18:55:02 +00:00
LTO	LTO: Add missing target triple from r218784	2014-10-01 18:49:58 +00:00
MC	[AArch64] Allow access to all system registers with MRS/MSR instructions.	2014-10-01 10:13:59 +00:00
Object
Other
TableGen
tools
Transforms	Make the sqrt intrinsic return undef for a negative input.	2014-10-01 20:36:33 +00:00
Unit
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lit.cfg
lit.site.cfg.in
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Makefile.tests
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