Ulrich Weigand 93f9010c1f [SystemZ] Support CL(G)T instructions ... This adds support for the compare logical and trap (memory) instructions that were added as part of the miscellaneous instruction extensions feature with zEC12. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286587 91177308-0d34-0410-b5e6-96231b3b80d8		2016-11-11 12:48:26 +00:00
..
AArch64	[MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser.	2016-11-08 18:31:04 +00:00
AMDGPU	[AMDGPU][mc] Improve test of special asm symbols.	2016-11-02 17:45:58 +00:00
ARM	[ARM] Thumb2 LDR (literal) should accept PC as the destination	2016-11-10 13:20:41 +00:00
AsmParser	[MC] Make llvm-mc fail cleanly on invalid output asm variant.	2016-10-31 18:36:31 +00:00
AVR	[AVR] Add all of the machine code test suite	2016-11-09 23:46:25 +00:00
COFF	Emit S_COMPILE3 record once per TU rather than once per function	2016-11-02 21:30:35 +00:00
Disassembler	[SystemZ] Support CL(G)T instructions	2016-11-11 12:48:26 +00:00
ELF	Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.	2016-10-27 23:20:19 +00:00
Hexagon
Lanai
MachO	Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.	2016-10-27 23:20:19 +00:00
Markup
Mips	[mips] synci microMIPS instruction definition.	2016-10-24 10:23:59 +00:00
PowerPC	[PPC] add absolute difference altivec instructions and matching intrinsics	2016-10-31 19:47:52 +00:00
Sparc
SystemZ	[SystemZ] Support CL(G)T instructions	2016-11-11 12:48:26 +00:00
X86	X86: Allow expressions to appear as u8imm operands.	2016-10-20 01:58:34 +00:00