mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-11 13:46:13 +00:00
2365c029a9
Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269636 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
640 B
ArmAsm
19 lines
640 B
ArmAsm
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
|
|
# RUN: FileCheck %s --check-prefix=R6
|
|
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
|
|
# RUN: FileCheck %s --check-prefix=R6
|
|
# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
|
|
# RUN: FileCheck %s --check-prefix=NOT-R6
|
|
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
|
|
# RUN: FileCheck %s --check-prefix=NOT-R6
|
|
|
|
.text
|
|
divu $25, $11
|
|
# R6: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
|
|
|
|
divu $25, $0
|
|
# NOT-R6: :[[@LINE-1]]:3: warning: division by zero
|
|
|
|
divu $0,$0
|
|
# NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero
|